Patents by Inventor Steve S. Sylvester

Steve S. Sylvester has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Dynamic hierarchical performance balancing of computational resources
    Patent number: 10466754
    Abstract: Systems and methods may provide a set of networked computational resources such as nodes that may be arranged in a hierarchy. A hierarchy of performance balancers receives performance samples from the computational resources beneath them and uses the performance samples to conduct a statistical analysis of variations in their performance. In one embodiment, the performance balancers steer power from faster resources to slower resources in order to enhance their performance, including in parallel processing.
    Type: Grant
    Filed: December 26, 2014
    Date of Patent: November 5, 2019
    Assignee: Intel Corporation
    Inventors: Jonathan M. Eastep, Ilya Sharapov, Richard J. Greco, Steve S. Sylvester, David N. Lombard
  • Mitigating component performance variation
    Patent number: 9864423
    Abstract: Apparatus and methods may provide for characterizing a plurality of similar components of a distributed computing system based on a maximum safe operation level associated with each component and storing characterization data in a database and allocating non-uniform power to each similar component based at least in part on the characterization data in the database to substantially equalize performance of the components.
    Type: Grant
    Filed: December 24, 2015
    Date of Patent: January 9, 2018
    Assignee: Intel Corporation
    Inventors: Alan G. Gara, Steve S. Sylvester, Jonathan M. Eastep, Ramkumar Nagappan, Christopher M. Cantalupo
  • Mitigating component performance variation
    Publication number: 20170185129
    Abstract: Apparatus and methods may provide for characterizing a plurality of similar components of a distributed computing system based on a maximum safe operation level associated with each component and storing characterization data in a database and allocating non-uniform power to each similar component based at least in part on the characterization data in the database to substantially equalize performance of the components.
    Type: Application
    Filed: December 24, 2015
    Publication date: June 29, 2017
    Applicant: Intel Corporation
    Inventors: Alan G. Gara, Steve S. Sylvester, Jonathan M. Eastep, Ramkumar Nagappan, Christopher M. Cantalupo
  • Progress meters in parallel computing
    Patent number: 9477533
    Abstract: Systems and methods may provide a set of cores capable of parallel execution of threads. Each of the cores may run code that is provided with a progress meter that calculates the amount of work remaining to be performed on threads as they run on their respective cores. The data may be collected continuously, and may be used to alter the frequency, speed or other operating characteristic of the cores as well as groups of cores. The progress meters may be annotated into existing code.
    Type: Grant
    Filed: December 26, 2014
    Date of Patent: October 25, 2016
    Assignee: Intel Corporation
    Inventors: Jonathan M. Eastep, Ilya Sharapov, Rob F. Van Der Wijngaart, Richard J. Greco, Steve S. Sylvester, David N. Lombard
  • DYNAMIC HIERARCHICAL PERFORMANCE BALANCING OF COMPUTATIONAL RESOURCES
    Publication number: 20160187944
    Abstract: Systems and methods may provide a set of networked computational resources such as nodes that may be arranged in a hierarchy. A hierarchy of performance balancers receives performance samples from the computational resources beneath them and uses the performance samples to conduct a statistical analysis of variations in their performance. In one embodiment, the performance balancers steer power from faster resources to slower resources in order to enhance their performance, including in parallel processing.
    Type: Application
    Filed: December 26, 2014
    Publication date: June 30, 2016
    Inventors: Jonathan M. Eastep, Ilya Sharapov, Richard J. Greco, Steve S. Sylvester, David N. Lombard
  • PROGRESS METERS IN PARALLEL COMPUTING
    Publication number: 20160188380
    Abstract: Systems and methods may provide a set of cores capable of parallel execution of threads. Each of the cores may run code that is provided with a progress meter that calculates the amount of work remaining to be performed on threads as they run on their respective cores. The data may be collected continuously, and may be used to alter the frequency, speed or other operating characteristic of the cores as well as groups of cores. The progress meters may be annotated into existing code.
    Type: Application
    Filed: December 26, 2014
    Publication date: June 30, 2016
    Inventors: Jonathan M. Eastep, Ilya Sharapov, Rob F. Van Der Wijngaart, Richard J. Greco, Steve S. Sylvester, David N. Lombard