Abstract: The present invention relates to providing server functionality in a dedicated module or a specially configured packet-switched telephone. The server function is preferably adapted to control the configuration and operation of a plurality of packet-switched telephones configured to operate as clients of the server function. The server function may control specific operation of the packet-switched telephones as well as support communications between the packet-switched telephones and other telephony devices over the packet-switched network. The server function may operate to facilitate communications with the supported packets-switched telephones using a first protocol and with the other telephony devices using a second protocol. The second protocol is preferably the Session Initiation Protocol (SIP).

Abstract: A Wireless LAN (WLAN) receiver with packet level Automatic Gain Control (AGC) is disclosed for receiving and converting an RF packet signal, conforming to the open standard IEEE 802.11, into recovered digital data. The receiver comprises a switchably coupled antenna, an analog signal processing circuitry for conditioning and selective frequency down-converting the RF signal into amplified, under a controllable analog gain G1A, video signals VSI and VSQ, an Analog to Digital Converter (ADC) for converting VSI and VSQ into digital outputs IADC and QADC and an AGC subsystem for effecting an adjustment of G1A and for digitally scaling, under a controllable digital gain G2D, the digital outputs LADC and QADC before final digital data recovery. The AGC subsystem further comprises a Calibration and Gain Setting firmware for measuring the preambles of each RF packet and responsively adjusting both G1A and G2D.

Abstract: A configurable dual-band RF transceiver with a cascaded frequency conversion scheme (DBXVR) is disclosed for the processing of any selected RF channel signal specified by the open standard IEEE 802.11 a/b/g for Wireless LAN. The DBXVR comprises two switchably connected antennae for receiving and transmitting any selected RF channel signal and two subsets of signal processing hardware. The first signal processing subset is designed to perform all related frequency conversion, signal filtering and amplification between the b/g-band and its corresponding Baseband Inphase (I) and Quadrature (Q) signals.

Abstract: The present invention relates to providing server functionality in a dedicated module or a specially configured packet-switched telephone. The server function is preferably adapted to control the configuration and operation of a plurality of packet-switched telephones configured to operate as clients of the server function. The server function may control specific operation of the packet-switched telephones as well as support communications between the packet-switched telephones and other telephony devices over the packet-switched network. The server function may operate to facilitate communications with the supported packets-witched telephones using a first protocol and with the other telephony devices using a second protocol. The second protocol is preferably the Session Initiation Protocol (SIP).

Abstract: A linearized channel amplifier comprising a linear channel amplifier circuit 20 and a nonlinear linearizer circuit located immediately before a high power amplifier. A common control circuit controls the linear channel amplifier circuit and the nonlinear linearizer circuit. The linearized channel amplifier functions as a driver amplifier and improves the linearity and efficiency performance of the high power amplifier across a desired frequency bandwidth. The linearized channel amplifier employs low cost temperature compensation circuits in an interface circuit and a temperature compensation network circuit, and uses a novel methodology to provide for command and control functions that includes a measurement, analytical calculation and setting process. An external personality plug may be to set the performance of the channel amplifier and linearizer.

Abstract: A broadband linearizer for use with a power amplifier. The broadband linearizer includes a preamplifier, a postamplifier and a broadband linearizer bridge coupled between the preamplifier and postamplifier. The linearizer bridge comprises a power divider for coupling power to linear and nonlinear arms, and a power combiner for combining outputs of the linear and nonlinear arms. The linear arm includes a first equalizer and a delay line, and the nonlinear arm includes a distortion generator and an attenuator. A second equalizer is coupled between the power combiner and the postamplifier. A control circuit controls settings of the preamplifier, the broadband linearizer bridge, and the postamplifier. The control circuit outputs voltage bias and constant current signals to control operation of the broadband linearizer.

Abstract: A system that precisely controls the gain of an RF amplifier over varying temperatures. The system monitors the temperature of the RF amplifier and precisely controls the diode current in PIN diodes to precisely control the gain of the RF amplifier.

Abstract: A broadband linearizer for use with a power amplifier. The broadband linearizer includes a broadband linearizer bridge, a preamplifier/attenuator, a post amplifier/attenuator, and a control circuit. The broadband linearizer bridge includes a power divider and a power combiner interconnected by linear and nonlinear arms. The linear arm has a phase shifter, a passive equalizer, and a first delay line that are serially coupled together. The nonlinear arm has a distortion generator, an attenuator and a second delay line that are serially coupled together. The control circuit controls respective settings of the broadband linearizer bridge, preamplifier/attenuator and post amplifier/attenuator. The control circuit provides bias circuitry and sends command and telemetry signals to control operation of the broadband linearizer. The broadband linearizer provides for independent, flexible gain and phase control that can mate with different kinds of power amplifiers having various gain and phase performance.

Abstract: A low phase noise oscillator 10 having a balanced feedback transformer 24 and a push-pull resonant circuit 12 for generating an oscillation excitation signal. The resonant circuit 12 is loaded by an output buffer 20 connected between first and second feedback terminals 16 and 18. The feedback transformer 24 provides first and second feedback paths of opposite phase polarity which link the resonant circuit 12 with the first and second feedback terminals 16 and 18.

Abstract: A wide bandwidth, low noise, fine frequency step phase locked loop frequency synthesizer (10) and processing method. The synthesizer (10) includes a first divider (16) for dividing a first signal provided by a reference frequency source (12). A first phase locked loop (20) is provided for receiving a divided first signal from the first divider (16) and providing an intermediate frequency signal in response thereto. The first phase locked loop (20) includes a first phase detector (22) for comparing the phase of the first signal to the phase of a first feedback signal and providing a first phase difference signal in response thereto. The first phase locked loop (20) includes a first voltage controlled oscillator (30) for providing the intermediate signal in response to the first phase difference signal. The first phase locked loop (20) includes a first mixer (32) for mixing the intermediate signal with a second signal at a second frequency F2 and providing the first feedback signal in response thereto.

Abstract: A frequency synthesizer (10) and method that achieves low phase noise and provides synthesized frequency signals in fine frequency step intervals. The synthesizer (10) comprises an L-band low phase noise frequency synthesizer with fine frequency step increments. The synthesizer (10) employs half-integer digital frequency dividing (25), VCO frequency offsetting, local oscillator harmonic mixing (34) and two phase locked loop circuits (12,13). The synthesizer (10) comprises a reference oscillator (11) for providing a reference frequency signal, and two phase locked loops (12,13). The first loop (12) is the fine loop and generates the frequency step size. The second loop (13) reduces the phase noise, reduces the frequency step size and translates to the desired freqeuncy. The output from a first VCO (21) is divided by a predetermined fixed number (31) to reduce the frequency step size and to reduce the phase noise.

Abstract: An information bearing signal (the object signal) for use in radar or radar-like circuitry is generated in a digital circuit and then converted through a bandpass matching filter into a corresponding analog signal. The object signal is then first combined in a NAND gate with a blanking control signal. In one embodiment, the selectively blanked object signal is frequency doubled by combining the blanked object signal and its quarter wave length shifted version in an EXCLUSIVE-OR gate. Thereafter, the frequency doubled version of the blanked object signal is combined in a second EXCLUSIVE-OR gate with a biphase modulation control signal which selectively inverts or noninverts the frequency doubled object signal. The output of the biphase modulated frequency doubled signal is then gated through a blanking NAND gate and coupled to the bandpass matching filter.

Abstract: A plurality of amplifier channels, wherein each channel is automatically gain controlled by a gain control signal and wherein the gain of each channel is a known function of a plurality of constants of corresponding to each amplifier and of the gain control signal, can be calibrated by the following method. The method comprising the steps of measuring each output of each amplifier at a corresponding plurality of gain control values and at a corresponding input to each amplifier. The number of the plurality of the constants equals the number of the plurality of the gain control values. The method continues by computing the gain of each amplifier at the step of measuring. The constants corresponding to each amplifier are then computed according to the function and computed gain. A corresponding changed gain control signal is applied to each amplifier according to the function to set the corresponding gain of each amplifier to a corresponding predetermined calibrated value.

Abstract: An internal impedance dependent amplifier has a gain as determined by the impedance at a predetermined node within the amplifier. A PIN diode is coupled to the predetermined node. The PIN diode is driven with a forward biased current which serves as the accurate gain control (AGC) signal for the amplifier. In the preferred embodiment, the PIN diode is driven by an operational amplifier in such a manner that the impedance thus coupled to the predetermined node in the amplifier is temperature independent. Because the PIN diode has an impedance given by:log R=A+B log Ip,whereR is the impedance of the PIN diode;IP is the forward biasing current; andA and B constants which are different for each PIN diode,the AGC voltage applied to the operational amplifier driving the PIN diode is linear with respect to the impedance of the PIN diode and hence is also linear with respect to the voltage gain of the impedance controlled amplifier to which the PIN diode is coupled.