Patents by Inventor Steve Schiveley
Steve Schiveley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7496997Abstract: A wound capacitor has a lead configuration that enables enhanced control over equivalent series resistance (ESR) and equivalent series inductance (ESL). The capacitor has a case and a wound foil disposed within the case. A ball-and-lead configuration is coupled to the foil and extends from the case.Type: GrantFiled: January 25, 2006Date of Patent: March 3, 2009Assignee: Intel CorporationInventors: Aaron J. Steyskal, Tao Liu, Steve Schiveley, Peir Chu, Mike Greenwood
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Patent number: 7042702Abstract: A wound capacitor has a lead configuration that enables enhanced control over equivalent series resistance (ESR) and equivalent series inductance (ESL). The capacitor has a case and a wound foil disposed within the case. A ball-and-lead configuration is coupled to the foil and extends from the case.Type: GrantFiled: December 15, 2003Date of Patent: May 9, 2006Assignee: Intel CorporationInventors: Aaron J. Steyskal, Tao Liu, Steve Schiveley, Peir Chu, Mike Greenwood
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Patent number: 7030460Abstract: A user-selectable integrated circuit capacitance apparatus may include first and second electrodes defining a first fractal geometry, along with second and third electrodes defining a second fractal geometry. A dielectric may be located adjacent to the first and third electrodes. A method of fabricating the apparatus may include selecting a dielectric layer, forming the first and second electrodes so as to define the first fractal geometry on the dielectric layer, and then forming third and fourth electrodes so as to define a second fractal geometry on the dielectric layer. A circuit package may include external package connections connected to the electrodes of the apparatus. A system may include the apparatus coupled to a wireless transceiver by way of a power supply trace.Type: GrantFiled: July 11, 2002Date of Patent: April 18, 2006Assignee: Intel CorporationInventors: Peir Chu, Steve Schiveley, Aaron J. Steyskal, Mike Greenwood, Tao Liu
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Publication number: 20050128677Abstract: A wound capacitor has a lead configuration that enables enhanced control over equivalent series resistance (ESR) and equivalent series inductance (ESL). The capacitor has a case and a wound foil disposed within the case. A ball-and-lead configuration is coupled to the foil and extends from the case.Type: ApplicationFiled: December 15, 2003Publication date: June 16, 2005Inventors: Aaron Steyskal, Tao Liu, Steve Schiveley, Peir Chu, Mike Greenwood
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Patent number: 6862784Abstract: A method of fabricating a capacitor provides for coupling a ball grid array (BGA) lead configuration to a foil and disposing the foil within a case. The BGA lead configuration extends from the case.Type: GrantFiled: January 16, 2003Date of Patent: March 8, 2005Assignee: Intel CorporationInventors: Tao Liu, Steve Schiveley, Peir Chu, Mike Greenwood, Aaron Steyskal
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Patent number: 6785118Abstract: A capacitor having a plurality of layers with at least one layer including a plurality of electrodes is described. In an embodiment, the electrodes are elongate. The plurality of electrodes includes a plurality of first polarity electrodes and a plurality of second polarity electrodes. In an embodiment, pairs of electrodes are formed by twisting one first polarity electrode and one second polarity electrode together. In an embodiment, first polarity electrodes and second polarity electrodes are woven together in each layer.Type: GrantFiled: March 31, 2003Date of Patent: August 31, 2004Assignee: Intel CorporationInventors: Tao Liu, Steve Schiveley, Peir Chu, Mike Greenwood, Aaron J. Steyskal
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Patent number: 6751087Abstract: The present invention provides a capacitor having a plurality of layers of aluminum foil connected to a first electrical terminal of the capacitor and another plurality of layers of aluminum foil connected to a second electrical terminal of the capacitor. The layers of aluminum foil are separated by a polymer such as a conductive organic polymer, so that each layer of polymer physically separates a layer of aluminum foil connected to the first terminal from a layer of aluminum foil connected to the second terminal. In some such embodiments the aluminum foil may be etched to provide greater surface area and capacitance, and also may be oxidized to form a dielectric layer.Type: GrantFiled: February 24, 2003Date of Patent: June 15, 2004Assignee: Intel CorporationInventors: Mike Greenwood, Steve Schiveley, Aaron J. Steyskal, Peir Chu, Tao Liu
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Patent number: 6704187Abstract: A termination assembly for a capacitor provides controlled ESR and ESL. First and second termination elements are attached to first and second foils to provide terminal connections. The first and second foils are wound into a cylinder such that the first and second termination elements form a shape within the cylinder and are spaced apart by a first distance. First and second leads are extending from the termination elements, respectively, such that the first and second leads are spaced apart by a second distance different from the first distance.Type: GrantFiled: September 24, 2001Date of Patent: March 9, 2004Assignee: Intel CorporationInventors: Steve Schiveley, Mike Greenwood, Tao Liu, Peir Chu, Aaron Steyskal
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Publication number: 20040007759Abstract: A user-selectable integrated circuit capacitance apparatus may include first and second electrodes defining a first fractal geometry, along with second and third electrodes defining a second fractal geometry. A dielectric may be located adjacent to the first and third electrodes. A method of fabricating the apparatus may include selecting a dielectric layer, forming the first and second electrodes so as to define the first fractal geometry on the dielectric layer, and then forming third and fourth electrodes so as to define a second fractal geometry on the dielectric layer. A circuit package may include external package connections connected to the electrodes of the apparatus. A system may include the apparatus coupled to a wireless transceiver by way of a power supply trace.Type: ApplicationFiled: July 11, 2002Publication date: January 15, 2004Applicant: Intel CorporationInventors: Peir Chu, Steve Schiveley, Aaron J. Steyskal, Mike Greenwood, Tao Liu
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Publication number: 20030137800Abstract: The present invention provides a capacitor having a plurality of layers of aluminum foil connected to a first electrical terminal of the capacitor and another plurality of layers of aluminum foil connected to a second electrical terminal of the capacitor. The layers of aluminum foil are separated by a polymer such as a conductive organic polymer, so that each layer of polymer physically separates a layer of aluminum foil connected to the first terminal from a layer of aluminum foil connected to the second terminal. In some such embodiments the aluminum foil may be etched to provide greater surface area and capacitance, and also may be oxidized to form a dielectric layer.Type: ApplicationFiled: February 24, 2003Publication date: July 24, 2003Applicant: Intel CorporationInventors: Mike Greenwood, Steve Schiveley, Aaron J. Steyskal, Peir Chu, Tao Liu
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Patent number: 6590762Abstract: The present invention provides a capacitor having a plurality of layers of aluminum foil connected to a first electrical terminal of the capacitor and another plurality of layers of aluminum foil connected to a second electrical terminal of the capacitor. The layers of aluminum foil are separated by a polymer such as a conductive organic polymer, so that each layer of polymer physically separates a layer of aluminum foil connected to the first terminal from a layer of aluminum foil connected to the second terminal. In some such embodiments the aluminum foil may be etched to provide greater surface area and capacitance, and also may be oxidized to form a dielectric layer.Type: GrantFiled: August 6, 2001Date of Patent: July 8, 2003Assignee: Intel CorporationInventors: Mike Greenwood, Steve Schiveley, Aaron J. Steyskal, Peir Chu, Tao Liu
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Publication number: 20030103317Abstract: A wound capacitor has a lead configuration that enables enhanced control over equivalent series resistance (ESR) and equivalent series inductance (ESL). The capacitor has a case and a wound foil disposed within the case. A ball grid array (BGA) lead configuration is coupled to the foil and extends from the case.Type: ApplicationFiled: January 16, 2003Publication date: June 5, 2003Inventors: Tao Liu, Steve Schiveley, Peir Chu, Mike Greenwood, Aaron Steyskal
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Publication number: 20030058603Abstract: A termination assembly for a capacitor provides controlled ESR and ESL. First and second termination elements are attached to first and second foils to provide terminal connections. The first and second foils are wound into a cylinder such that the first and second termination elements form a shape within the cylinder and are spaced apart by a first distance. First and second leads are extending from the termination elements, respectively, such that the first and second leads are spaced apart by a second distance different from the first distance.Type: ApplicationFiled: September 24, 2001Publication date: March 27, 2003Inventors: Steve Schiveley, Mike Greenwood, Tao Liu, Peir Chu, Aaron Steyskal
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Patent number: 6529365Abstract: A wound capacitor has a lead configuration that enables enhanced control over equivalent series resistance (ESR) and equivalent series inductance (ESL). The capacitor has a case and a wound foil disposed within the case. A ball grid array (BGA) lead configuration is coupled to the foil and extends from the case.Type: GrantFiled: September 28, 2001Date of Patent: March 4, 2003Assignee: Intel CorporationInventors: Tao Liu, Steve Schiveley, Peir Chu, Mike Greenwood, Aaron Steyskal
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Patent number: 6519136Abstract: A dielectric hybrid material and a dielectric hybrid capacitor.Type: GrantFiled: March 29, 2002Date of Patent: February 11, 2003Assignee: Intel CorporationInventors: Peir Chu, Steve Schiveley, Aaron J. Steyskal, Mike Greenwood, Tao Liu
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Publication number: 20030026058Abstract: The present invention provides a capacitor having a plurality of layers of aluminum foil connected to a first electrical terminal of the capacitor and another plurality of layers of aluminum foil connected to a second electrical terminal of the capacitor. The layers of aluminum foil are separated by a polymer such as a conductive organic polymer, so that each layer of polymer physically separates a layer of aluminum foil connected to the first terminal from a layer of aluminum foil connected to the second terminal. In some such embodiments the aluminum foil may be etched to provide greater surface area and capacitance, and also may be oxidized to form a dielectric layer.Type: ApplicationFiled: August 6, 2001Publication date: February 6, 2003Applicant: Intel CorporationInventors: Mike Greenwood, Steve Schiveley, Aaron J. Steyskal, Peir Chu, Tao Liu