Patents by Inventor Steve Vu

Steve Vu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9547623
    Abstract: A flexible memory interface system includes a control module, instruction memory, a command processing unit, an address processing unit, and a data processing unit. The control module controls storing and retrieving of a command portion, an addressing portion, and data of an instruction to access memory to and from the instruction memory and the command processing unit, the address processing unit, and the data processing unit, respectively. The command processing unit is operably coupled to process a command portion of an instruction to access memory. The address processing unit is operably coupled to process an addressing portion of the instruction to access the memory. The data processing unit is operably coupled to process data conveyance to or from the external memory based on the instruction to access the memory.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: January 17, 2017
    Assignee: SIGMATEL, INC.
    Inventors: Steve Vu, Jean Charles Pina
  • Patent number: 9335223
    Abstract: Methods and circuits for measuring the temperature of a transistor are disclosed. An embodiment of the method includes, providing a current into a circuit, wherein the circuit is connected to the transistor. A variable resistance is connected between the base and collector of the transistor. The circuit has a first mode and a second mode, wherein the current in the first mode flows into the base of the transistor and through the resistance and the current in the second mode flows into the emitter of the transistor. Voltages in both the first mode and the second mode are measured using different resistance settings. The temperature of the transistor is calculated based on the difference between the different voltages.
    Type: Grant
    Filed: April 19, 2013
    Date of Patent: May 10, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Mikel K. Ash, Krishnaswamy Nagaraj, Paul Kimelman, Steve Vu
  • Publication number: 20140314124
    Abstract: Methods and circuits for measuring the temperature of a transistor are disclosed. An embodiment of the method includes, providing a current into a circuit, wherein the circuit is connected to the transistor. A variable resistance is connected between the base and collector of the transistor. The circuit has a first mode and a second mode, wherein the current in the first mode flows into the base of the transistor and through the resistance and the current in the second mode flows into the emitter of the transistor. Voltages in both the first mode and the second mode are measured using different resistance settings. The temperature of the transistor is calculated based on the difference between the different voltages.
    Type: Application
    Filed: April 19, 2013
    Publication date: October 23, 2014
    Applicant: Texas Instruments Incorporated
    Inventors: Mikel K. Ash, Krishnaswamy Nagaraj, Paul Kimelman, Steve Vu
  • Publication number: 20050005078
    Abstract: A flexible memory interface system includes a control module, instruction memory, a command processing unit, an address processing unit, and a data processing unit. The control module controls storing and retrieving of a command portion, an addressing portion, and data of an instruction to access memory to and from the instruction memory and the command processing unit, the address processing unit, and the data processing unit, respectively. The command processing unit is operably coupled to process a command portion of an instruction to access memory. The address processing unit is operably coupled to process an addressing portion of the instruction to access the memory. The data processing unit is operably coupled to process data conveyance to or from the external memory based on the instruction to access the memory.
    Type: Application
    Filed: June 10, 2004
    Publication date: January 6, 2005
    Inventors: Steve Vu, Jean Pina
  • Patent number: 6021072
    Abstract: A method for precharging a selected bitline (20) in a nonvolatile memory array using a boost circuit (54) in parallel to a pull-up device (22) for biasing the bitline. The boost circuit (54) is controlled by a pulse signal (26). One embodiment uses a regulator circuit (56) to isolate the boost circuit (54) from the bitline when the bitline voltage exceeds a threshold voltage level. The regulator triggers a delay circuit (58) which is coupled to a sense amplifier (60). The delay circuit (58) then defers activation of the sense amplifier (60) until the voltage on the selected bitline (20) is below a sense amplifier threshold voltage level.
    Type: Grant
    Filed: July 27, 1998
    Date of Patent: February 1, 2000
    Assignee: Motorola, Inc.
    Inventors: Fujio Takeda, Steve Vu