Abstract: Provided is an etching-before-packaging horizontal chip three-dimensional system level metal circuit board structure comprising a metal substrate frame; the metal substrate frame is provided with base islands and pins therein; the front faces of the base islands are provided with chips; the front faces of the chips are connected to the front faces of the pins via metal wires; conductive posts are disposed on the front faces or back faces of the pins; the peripheral areas of the base islands, the areas between the base islands and the pins, the areas between the pins, the areas above the base islands and the pins, the areas below the base islands and the pins, and the exteriors of the chips, the metal wires and the conductive posts are all encapsulated with molding compound.

Abstract: Provided is an etching-before-packaging horizontal chip three-dimensional system level metal circuit board structure comprising a metal substrate frame; the metal substrate frame is provided with base islands and pins therein; the front faces of the base islands are provided with chips; the front faces of the chips are connected to the front faces of the pins via metal wires; conductive posts are disposed on the front faces or back faces of the pins; the peripheral areas of the base islands, the areas between the base islands and the pins, the areas between the pins, the areas above the base islands and the pins, the areas below the base islands and the pins, and the exteriors of the chips, the metal wires and the conductive posts are all encapsulated with molding compound.

Abstract: Provided are a packaging-before-etching flip chip 3D system-level metal circuit board structure and technique thereof. The metal circuit board structure comprises a metal substrate frame; the front face of the metal substrate frame is provided with pins; the front faces of the pins are provided with conductive posts; chips are installed in a flip manner between the pins via underfills; the peripheral areas of the pins, the conductive posts and the chip are encapsulated with molding compound, the top of the molding compound being parallel to the tops of the conductive posts; and the surfaces of the metal substrate frame, the pins and the conductive posts exposing out of the molding compounds are provided with an anti-oxidation layer, thus solving the problem of limited functionality and application of a traditional metal lead frame due to the fact that objects cannot be embedded therein.

Abstract: A first-packaged and later-etched three-dimensional flip-chip system-in-package structure and a processing method thereof are provided. The package structure includes: a pad (1), a pin (2); a conductive pillar (3) disposed on an upper surface of the pin (2); a first die (4) flipped on an upper surface of the pad (1); a first molding material or epoxy resin (9) for encapsulating with a peripheral region of the conductive pillar (3) and the first die (4); an anti-oxidation layer (11) provided on a surface of the conductive pillar (3) exposed from the first molding material or epoxy resin (9); a second die (8) flipped on a lower surface of the pad (1) and the pin (2); and a second molding material or epoxy resin (10) for encapsulating with the region of the lower surfaces of the pad (1) and the pin (2) and a peripheral region of the second die (8).

Abstract: The present invention relates to a first-packaged and later-etched normal chip three dimension-on-chip metal circuit board structure and a processing method for manufacturing the same, the structure includes: metal substrate frame (1); a lead (3) provided in the metal substrate frame (1); a conductive pillar (4) provided in a top surface of the lead (3); a chip is mounted normally on a top surface of the metal circuit frame (1) or between the leads (3); a metal wire (6) via which a top surface of the chip (5) is connected to a top surface of the lead (3); a molding material (8) with which a periphery region of the lead (3), the conductive pillar (4), the chip (5) and the metal wire (6) is encapsulated, with the molding material (8) being flushed with a top of the conductive pillar (4).

Abstract: A flip chip semiconductor packaging device and method that incorporates in situ formation of cavities underneath selected portions of a die during a flip chip die bonding process. A method of flip chip semiconductor component packaging includes providing a die having a first surface, forming a barrier on first surface of the die, the barrier at least partially surrounding a designated location on the first surface of the die, bonding the die to a substrate in a flip chip configuration, and flowing molding compound over the die and over at least a portion of the substrate. Bonding the die to the substrate includes causing contact between the barrier and the substrate such that flow of the molding compound is blocked by the barrier to provide a cavity between the die and the substrate, the cavity being proximate the designated location on the first surface of the die.

Abstract: A flip chip semiconductor packaging device and method that incorporates in situ formation of cavities underneath selected portions of a die during a flip chip die bonding process. A method of flip chip semiconductor component packaging includes providing a die having a first surface, forming a barrier on first surface of the die, the barrier at least partially surrounding a designated location on the first surface of the die, bonding the die to a substrate in a flip chip configuration, and flowing molding compound over the die and over at least a portion of the substrate. Bonding the die to the substrate includes causing contact between the barrier and the substrate such that flow of the molding compound is blocked by the barrier to provide a cavity between the die and the substrate, the cavity being proximate the designated location on the first surface of the die.

Abstract: A thermal mechanical process for bonding a flip chip die to a substrate. The flip chip die includes a plurality of copper pillar bumps, each copper pillar bump of the plurality of copper pillar bumps having a copper portion attached to the die and a bonding cap attached to the copper portion. The process includes positioning the die on the substrate such that the bonding cap of each copper pillar bump of the plurality of copper pillar bumps contacts a corresponding respective one of a plurality of bonding pads on the substrate, and thermosonically bonding the die to the substrate.

Abstract: A thermal mechanical process for bonding a flip chip die to a substrate. The flip chip die includes a plurality of copper pillar bumps, each copper pillar bump of the plurality of copper pillar bumps having a copper portion attached to the die and a bonding cap attached to the copper portion. The process includes positioning the die on the substrate such that the bonding cap of each copper pillar bump of the plurality of copper pillar bumps contacts a corresponding respective one of a plurality of bonding pads on the substrate, and thermosonically bonding the die to the substrate.