Abstract: A phase detector includes a decimator to decimate a digitized in-phase signal and a digitized quadrature signal to N times a symbol rate, where N is an integer greater than one. A burst detector to detect bursts in an output of the decimator. A carrier offset block to determine an offset angle based on an output of the burst detector. A rotator to generate a rotated signal by rotating the output of the decimator based on the offset angle determined by the carrier offset block. An equalizer to perform coherent demodulation of the rotated signal.

Abstract: A phase detector includes a decimator to decimate a digitized in-phase signal and a digitized quadrature signal to N times a symbol rate, where N is an integer greater than one. A burst detector to detect bursts in an output of the decimator. A carrier offset block to determine an offset angle based on an output of the burst detector. A rotator to generate a rotated signal by rotating the output of the decimator based on the offset angle determined by the carrier offset block. An equalizer to perform coherent demodulation of the rotated signal.

Abstract: A digital up-sampling converter (DUSC) employs a signal input provided by a digital signal process (DSP) at a first rate feeding a Square Root Raised Cosine (SRRC) filter which provides for table look up of filter coefficients for a multiple symbol span and provides a sampling output at a second rate which is a multiple M of the first rate. A digital to analog converter (DAC) receives the sampling output at the second rate for conversion to an analog signal and a low pass analog filter processes the analog signal for delivery to an RF transmitter.

Abstract: A limiter based analog demodulator includes a power amplifier receiving a base-band signal and a local clock operating at the base-band frequency. A first multiplier receives an output from the power amplifier and the local clock to provide an in phase signal. A quadrature phase shifter receives the local clock and a second multiplier receives the output from the power amplifier and an output from the phase shifter to provide a quadrature signal. Analog filters receive the in phase and quadrature signals and analog to digital converters connected to the analog filters provide digitized in phase and quadrature signals. The phase detector then receives the digitized in phase and quadrature signals.