Abstract: A bi-layer silicon electrode and its method of fabrication is described. The electrode of the present invention comprises a lower polysilicon film having a random grain microstructure, and an upper polysilicon film having a columnar grain microstructure.

Abstract: An apparatus that includes a pumping plate having a skirt, where the skirt contains a number of holes and a wafer access slot, and where the number of holes are sized and positioned to provide uniform heating of a susceptor.

Abstract: A method of forming a polycrystalline silicon film comprising: providing a process gas mix comprising a silicon source gas and a dilution gas mix wherein the dilution gas mix comprises H2 and an inert gas; and forming a polycrystalline silicon film from said silicon source gas.

Abstract: The invention provides methods and apparatuses of forming a silicon nitride layer on a semiconductor wafer. A semiconductor wafer is located on a susceptor within a semiconductor processing chamber. A carrier gas, a nitrogen source gas, and a silicon source gas are introduced into the semiconductor processing chamber and a semiconductor wafer is exposed to the mixture of gases at a pressure in the chamber in the range of approximately 100 to 500 Torr.

Abstract: A method for depositing doped polycrystalline or amorphous silicon film. The method includes placing a substrate onto a susceptor. The susceptor includes a body having a resistive heater therein and a thermocouple in physical contact with the resistive heater. The susceptor is located in the process chamber such that the process chamber has a top portion above the susceptor and a bottom portion below the susceptor. The method further includes heating the susceptor. The method further includes providing a process gas mix into the process chamber through a shower head located on the susceptor. The process gas mix includes a silicon source gas, a dopant gas, and a carrier gas. The carrier gas includes nitrogen. The method further includes forming the doped silicon film from the silicon source gas.

Abstract: A method and apparatus for directing a process gas through a processing apparatus, such as a vapor deposition chamber. The apparatus comprises a pumping plate for a processing chamber having an annular body member wherein said body member has a first portion and a second defining a circumferential edge and a central opening. The first portion comprises a sidewall of the circumferential edge having a plurality of circumferentially spaced through holes and the second portion has comprises a lateral portion that protrudes from the circumferential edge, such that, in a processing chamber, the first portion defines a first gas flow region comprising the central opening and a second gas flow region comprising the lateral portion of the second portion.

Abstract: Provided herein is an emissivity-change-free pumping plate kit used in a single wafer chamber. This kit comprises a top open pumping plate, and optionally a skirt and/or a second stage choking plate. The skirt may be installed around the wafer heater, underneath the wafer heater, or along the chamber body inside the chamber. The choking plate is installed downstream of the top open pumping plate along the purge gas flow. Also provided is a method of preventing emissivity change and further providing optimal film thickness uniformity during wafer processing by utilizing such kit in the chamber.

Abstract: The invention provides a method of making a transistor. A gate dielectric layer is formed on a semiconductor substrate. A gate is formed on the dielectric layer, the gate having an exposed upper surface and exposed side surfaces. A first silicon nitride layer having a first thickness is deposited over the gate, for example over an oxide layer on the gate, at a first deposition rate. A second silicon nitride layer having a second thickness is deposited over the first silicon nitride layer at a second deposition rate, the second thickness being more that the first thickness and the second deposition rate being more than the first deposition rate. The first silicon nitrogen layer then has a lower hydrogen concentration. At least the second silicon nitride layer (or a silicon oxide layer in the case of an ONO spacer) is etched to leave spacers next to the side surfaces while exposing the upper surface of the gate and areas of the substrate outside the spacers.

Abstract: A method for depositing doped polycrystalline or amorphous silicon film. The method includes placing a substrate onto a susceptor. The susceptor includes a body having a resistive heater therein and a thermocouple in physical contact with the resistive heater. The susceptor is located in the process chamber such that the process chamber has a top portion above the susceptor and a bottom portion below the susceptor. The method further includes heating the susceptor. The method further includes providing a process gas mix into the process chamber through a shower head located on the susceptor. The process gas mix includes a silicon source gas, a dopant gas, and a carrier gas. The carrier gas includes nitrogen. The method further includes forming the doped silicon film from the silicon source gas.

Abstract: A silicon nitride layer is formed over transistor gates while the processing temperature is relatively high, typically at least 500° C., and the pressure is relatively high, typically at least 50 Torr, to obtain a relatively high rate of formation of the silicon nitride layer. Processing conditions are controlled so as to more uniformly form the silicon nitride layer. Generally, the ratio of the NH3 gas to the silicon-containing gas by volume is selected sufficiently high so that, should the surface have a low region between transistor gates which is less than 0.15 microns wide and have a height-to-width ratio of at least 1.0, as well as an entirely flat area of at least 5 microns by 5 microns, the layer forms at a rate of not more than 25% faster on the flat area than on a base of the low region.

Abstract: A bi-layer silicon electrode and its method of fabrication is described. The electrode of the present invention comprises a lower polysilicon film having a random grain microstructure, and an upper polysilicon film having a columnar grain microstructure.

Abstract: Methods and apparatuses of forming a film on a substrate including introducing a pretreatment material into a processing chamber sufficient to form a film as a portion of an inner surface of the processing chamber to inhibit outgassing from that portion of the chamber, introducing a substrate into the chamber, and forming a film on the substrate.

Abstract: A method for depositing doped polycrystalline or amorphous silicon film. The method includes placing a substrate onto a susceptor. The susceptor includes a body having a resistive heater therein and a thermocouple in physical contact with the resistive heater. The susceptor is located in the process chamber such that the process chamber has a top portion above the susceptor and a bottom portion below the susceptor. The method further includes heating the susceptor. The method further includes providing a process gas mix into the process chamber through a shower head located on the susceptor. The process gas mix includes a silicon source gas, a dopant gas, and a carrier gas. The carrier gas includes nitrogen. The method further includes forming the doped silicon film from the silicon source gas.

Abstract: Provided herein is an emissivity-change-free pumping plate kit used in a single wafer chamber. This kit comprises a top open pumping plate, and optionally a skirt and/or a second stage choking plate. The skirt may be installed around the wafer heater, underneath the wafer heater, or along the chamber body inside the chamber. The choking plate is installed downstream of the top open pumping plate along the purge gas flow. Also provided is a method of preventing emissivity change and further providing optimal film thickness uniformity during wafer processing by utilizing such kit in the chamber.

Abstract: An apparatus that includes a pumping plate having a skirt, where the skirt contains a number of holes and a wafer access slot, and where the number of holes are sized and positioned to provide uniform heating of a susceptor.

Abstract: The invention provides methods and apparatuses of forming a silicon nitride layer on a semiconductor wafer is located on a susceptor within a semiconductor processing chamber. A carrier gas, a nitrogen source gas, and a silicon source gas are introduced into the semiconductor processing chamber and a semiconductor wafer is exposed to the mixture of gases at a pressure in the chamber in the range of approximately 100 on to 500 Torr.

Abstract: A semiconductor processing system includes a semiconductor processing chamber constructed of a main body, a window support member, and a window. The window support member is located over an opening into the main body. The window is located over the window support component. At least one radiation passage is formed in the window support component. The radiation passage has a first end which is open to the internal dimensions of the main body and a second end, opposing the first end, which terminates against the window.

Abstract: A semiconductor processing system comprising a semiconductor processing chamber, a light, a temperature detector, and a member. The light is positioned to heat the confines of the chamber. The temperature detector measures the temperature at the location within the chamber. The member has a translucent quartz shell and opaque core and shields the location from light emanating from the light source.

Abstract: A wafer heater assembly (8) for a deposition/etch chamber (2) includes a base (32) and a wafer support or chuck (36), having a wafer-chucking surface (76), spaced apart from the base by a circumferential barrier support (38). A heater sub-assembly (54) is mounted to the wafer support. Bolts (48) are used to secure the wafer support to the base with the barrier support therebetween to press the barrier support against an elastomeric O-ring, a metal V-seal or other fluid seal (46) positioned between the base and base end (42) of the barrier support. This eliminates the need to discard the entire heater assembly if the dielectric wafer-chucking surface becomes damaged. The temperature of the fluid seal is about 50.degree.-70.degree. C. lower than the temperature of the wafer-chucking surface when the wafer-chucking surface is about 200.degree.-300.degree. C.