Patents by Inventor Steven A. Smith

Steven A. Smith has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140249099
    Abstract: The present application relates to compositions and methods for treating a proliferative disorder by administering to a subject a pharmaceutical composition of a dual kinase inhibitor metabolite. Catecholic butane metabolites can serve as dual kinase inhibitors for purposes of methods described herein.
    Type: Application
    Filed: February 26, 2014
    Publication date: September 4, 2014
    Applicant: TriAct Therapeutics, Inc.
    Inventors: Thomas F. WHITE, Steven SMITH
  • Patent number: 8801505
    Abstract: An abrading device for abrading a floor structure comprises a first abrading assembly and a second abrading assembly. The first and second abrading assemblies each have a rotationally driven contact roll provided with a sleeve having a plurality of cutouts formed in a pattern thereon. An abrading belt is trained over the sleeve. A first oscillation assembly is connected to the first abrading assembly and oscillates the contact roll of the first abrading assembly in a first direction via a linear reciprocating motion. A second oscillation assembly is connected to the second abrading assembly and oscillates the contact roll of the second abrading assembly in a second direction via a linear reciprocating motion. The first and second abrading assemblies consecutively abrade a top surface of the floor structure with the pattern formed by the cutouts on the respective sleeves to form a distressed visible pattern thereon.
    Type: Grant
    Filed: June 29, 2010
    Date of Patent: August 12, 2014
    Assignee: AWI Licensing Company
    Inventor: W. Steven Smith
  • Patent number: 8767433
    Abstract: Methods for testing unprogrammed single transistor and two transistor anti-fuse memory cells include testing for connections of the cells to a bitline by comparing a voltage characteristic of a bitline connected to the cell under test to a reference bitline having a predetermined voltage characteristic. Some methods can use test cells having an access transistor identically configured to the access transistor of a normal memory cell, but omitting the anti-fuse device found in the normal memory cell, for testing the presence of a connection of the normal memory cell to the bitline. Such a test cell can be used in a further test for determining the level of capacitive coupling of the wordline voltage to the bitlines relative to that of a normal memory cell under test.
    Type: Grant
    Filed: March 5, 2012
    Date of Patent: July 1, 2014
    Assignee: Sidense Corp.
    Inventors: Wlodek Kurjanowicz, Steven Smith
  • Patent number: 8689213
    Abstract: The methods and systems described herein provide for establishing a secure communication channel between a non-trusted virtual machine and a trusted virtual machine, in a computing device executing a hypervisor hosting the trusted virtual machine, the non-trusted virtual machine, and a third virtual machine. The method includes writing, by a non-trusted virtual machine, a first string of data to a region of memory of the computing device. The method also includes detecting, by a trusted virtual machine, the first string of data written to the region of memory. The method further includes establishing a communication channel between the trusted virtual machine and the non-trusted virtual machine by locking, by the trusted virtual machine and responsive to the detection, the region of memory for the duration of the communication to prevent a third virtual machine from accessing the region of memory.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: April 1, 2014
    Assignee: Citrix Systems, Inc.
    Inventors: Ross Philipson, Steven Smith, James McKenzie, Jean Guyader
  • Patent number: 8663904
    Abstract: Embodiments in accordance with the present invention provide for non-self imageable norbornene-type polymers useful for immersion lithographic processes, methods of making such polymers, compositions employing such polymers and immersion lithographic processes that make use of such compositions. More specifically the embodiments of the present invention are related to norbornene-type polymers useful for forming top-coat layers for overlying photoresist layers in immersion lithographic process and the process thereof.
    Type: Grant
    Filed: August 7, 2013
    Date of Patent: March 4, 2014
    Assignee: Promerus, LLC
    Inventors: Pramod Kandanarachchi, Kazuyoshi Fujita, Steven Smith, Larry F Rhodes
  • Publication number: 20140053379
    Abstract: A method of applying a bittering agent to a substrate provided by an item which it is desired to impregnate in order to prevent, for example, chewing of the item, is disclosed. The method comprises the steps of: applying a first coating layer to the substrate, the first coating layer being of a substance that can be treated to acquire a hardened state; applying a bittering agent to the first layer; and treating the first coating layer thereby to generate the hardened state.
    Type: Application
    Filed: August 23, 2013
    Publication date: February 27, 2014
    Inventor: Steven SMITH
  • Publication number: 20130323644
    Abstract: Embodiments in accordance with the present invention provide for non-self imagable norbornene-type polymers useful for immersion lithographic processes, methods of making such polymers, compositions employing such polymers and immersion lithographic processes that make use of such compositions. More specifically the embodiments of the present invention are related to norbornene-type polymers useful for forming top-coat layers for overlying photoresist layers in immersion lithographic process and the process thereof.
    Type: Application
    Filed: August 7, 2013
    Publication date: December 5, 2013
    Applicant: Promerus, LLC
    Inventors: Pramod Kandanarachchi, Kazuyoshi Fujita, Steven Smith, Larry F. Rhodes
  • Publication number: 20130308365
    Abstract: An active precharge circuit for a non-volatile memory array which minimizes write disturb to non-selected memory cells during programming is disclosed. In a programming cycle, all bitlines are pre-charged to a program inhibit voltage level and held at the program inhibit voltage level with current or voltage sources coupled to each of the bitlines in a precharge operation and a following programming operation. In the programming operation, a bitline connected to a memory cell to be programmed is driven to a programming level, such as VSS, while the active precharge circuit is enabled to enable programming thereof. Because the other non-selected bitlines are held at the program inhibit voltage level, they will not be inadvertently programmed when the programming voltage is supplied by the word line.
    Type: Application
    Filed: May 17, 2013
    Publication date: November 21, 2013
    Applicant: SIDENSE CORP.
    Inventor: Steven SMITH
  • Publication number: 20130308364
    Abstract: A power up detection method for a memory device and a memory device are disclosed. In a first phase, a test word is read from a read-only memory (ROM) row of a memory array of the memory device, and the test word is compared to predetermined ROM row data. If the test word matches the predetermined ROM row data, a second phase may be performed. In the second phase, first user data is read from a user-programmed row of the memory array at a first time. Second user data is read from the user-programmed row of the memory array at a second time different from the first time. The first user data is compared to the second user data. Successful power up of the memory device is determined when the first user data matches the second user data.
    Type: Application
    Filed: May 15, 2013
    Publication date: November 21, 2013
    Applicant: SIDENSE CORP.
    Inventor: Steven SMITH
  • Publication number: 20130280302
    Abstract: The invention relates to a pharmaceutical product comprising an allergen extract or an allergoid thereof for the treatment and/or prevention of allergy and allergic asthma caused by house dust mites, which extract comprises at least one extract of mite bodies selected from the following groups a)-b): a) An extract of Der p mite bodies, and b) An extract of Der f mite bodies, and at least one extract of mite cultures selected from the following groups c)-g): c) An extract of Der p faecal particles, d) An extract of Der f faecal particles, e) An extract of Der f whole mite culture, f) An extract of an Der p whole mite culture, and g) a combination of extracts c) to f).
    Type: Application
    Filed: June 3, 2011
    Publication date: October 24, 2013
    Inventors: Heather Michelle Webster, Jason Daniel Frey, Trena Larissa Repp, Craig T. Grass, David Rowles, Gary Steven Smith, Domingo Barber Hernandez, Fernando Juan Vidales, Carmen Artega Vazquez, Juan Carlos Moreno Segura, Maria Jose Chamorro Salillas
  • Patent number: 8544419
    Abstract: Livestock insect-removal systems and methods. According to one embodiment, the system may comprise a structure with a defined path for passage of livestock. The system may comprise a container removably attached to the structure and a vacuum device within the container configured to generate a change in pressure within the container. The system may comprise a first duct to expel air from the container and direct air across the path and displace or dislodge insects. The first duct may further comprise a vent to expel bypass air from the first duct. The system may comprise a second duct, positioned along the path to draw air and dislodged insects into the container.
    Type: Grant
    Filed: November 20, 2012
    Date of Patent: October 1, 2013
    Assignees: Spalding Laboratories, Inc., North Carolina State University
    Inventors: Thomas James Spalding, Zachary Thomas Spalding, Steven Smith Denning
  • Patent number: 8541523
    Abstract: Embodiments in accordance with the present invention provide for non-self imageable norbornene-type polymers useful for immersion lithographic processes, methods of making such polymers, compositions employing such polymers and immersion lithographic processes that make use of such compositions. More specifically the embodiments of the present invention are related to norbornene-type polymers useful for forming top-coat layers for overlying photoresist layers in immersion lithographic process and the process thereof.
    Type: Grant
    Filed: April 4, 2011
    Date of Patent: September 24, 2013
    Assignee: Promerus, LLC
    Inventors: Pramod Kandanarachchi, Kazuyoshi Fujita, Steven Smith, Larry F. Rhodes
  • Patent number: 8431532
    Abstract: Methods of treatment using Fzd8 extracellular domains (ECDs), Fzd8 ECD fusion molecules, and/or antibodies that bind Fzd8 are provided. Such methods include, but are not limited to, methods of treating obesity and obesity-related conditions. Fzd8 ECDs and Fzd8 ECD fusion molecules are also provided. Polypeptide and polynucleotide sequences, vectors, host cells, and compositions comprising or encoding such molecules are provided. Methods of making and using Fzd8 ECDs, Fzd8 ECD fusion molecules, and antibodies that bind Fzd8 are also provided.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: April 30, 2013
    Assignee: Five Prime Therepeutics, Inc.
    Inventors: Thomas Brennan, Ernestine Lee, Steven Smith
  • Patent number: 8406812
    Abstract: The invention provides an antenna array suitable for use in a base station in a wireless communications network, the antenna array having a first beamforming arrangement for producing uplink beams and a second beamforming arrangement for producing downlink beams, wherein the first and second beamforming arrangements are different from one another. Preferably the first and second beamforming arrangements feed a common antenna array to produce the uplink and downlink beams. Particularly preferably a plurality of (sin x/x) beams are formed for the uplink, and a plurality of low cusp beams are formed for the downlink. These are advantageously dual polar, in order to achieve diversity gain. In a preferred embodiment, the antenna array is arranged such that three dual polar low cusp beams are formed for the downlink, and six dual polar (sin x/x) beams are formed for the uplink.
    Type: Grant
    Filed: August 17, 2010
    Date of Patent: March 26, 2013
    Assignee: Apple, Inc.
    Inventors: Martin Stevens Smith, Andrew James Urquhart, Julius George Robson, David Damian Nichols Bevan
  • Publication number: 20130050830
    Abstract: A covered mandrel that includes a mandrel and a covering. The mandrel has an outer surface and comprises a first material. The covering is engaged to the outer surface of the mandrel and comprises a second material different than the first material. At least a portion of the covered mandrel is configured to scatter light.
    Type: Application
    Filed: September 22, 2011
    Publication date: February 28, 2013
    Applicant: BOSTON SCIENTIFIC SCIMED, INC.
    Inventors: Michael Sterud, Brian Reynolds, Roger McGowan, Mark Steven Smith, Paul F. Chouinard, Kristopher Henry Vietmeier
  • Patent number: 8331547
    Abstract: The present invention relates to an apparatus (10) for handling telephone calls which comprises: means for configuring the operation of the apparatus based on user preferences relating to the handling of calls from particular callers, means for storing the user preferences, means for processing incoming calls based on the user preferences, and means for receiving updates to the user preferences in dependence on changes to a preference database for storing the preferences of at least one user. The invention also relates to a telecommunications system, and to an associated server.
    Type: Grant
    Filed: May 4, 2006
    Date of Patent: December 11, 2012
    Assignee: Arona, Ltd.
    Inventors: Steven Smith, John Price
  • Patent number: 8313987
    Abstract: An anti-fuse memory cell having a variable thickness gate dielectric. The variable thickness dielectric has a thick portion and a thin portion, where the thin portion has at least one dimension less than a minimum feature size of a process technology. The thin portion can be rectangular in shape or triangular in shape. The anti-fuse transistor can be used in a two-transistor memory cell having an access transistor with a gate dielectric substantially identical in thickness to the thick portion of the variable thickness gate dielectric of the anti-fuse transistor.
    Type: Grant
    Filed: August 26, 2011
    Date of Patent: November 20, 2012
    Assignee: Sidense Corp.
    Inventors: Wlodek Kurjanowicz, Steven Smith
  • Publication number: 20120182782
    Abstract: Methods for testing unprogrammed single transistor and two transistor anti-fuse memory cells include testing for connections of the cells to a bitline by comparing a voltage characteristic of a bitline connected to the cell under test to a reference bitline having a predetermined voltage characteristic. Some methods can use test cells having an access transistor identically configured to the access transistor of a normal memory cell, but omitting the anti-fuse device found in the normal memory cell, for testing the presence of a connection of the normal memory cell to the bitline. Such a test cell can be used in a further test for determining the level of capacitive coupling of the wordline voltage to the bitlines relative to that of a normal memory cell under test.
    Type: Application
    Filed: March 5, 2012
    Publication date: July 19, 2012
    Applicant: SIDENSE CORP.
    Inventors: Wlodek KURJANOWICZ, Steven SMITH
  • Publication number: 20120176906
    Abstract: A system for testing a wireless access device having a plurality of radio modules is provided. The system includes a housing having an interior chamber. The interior chamber is adapted to receive a wireless access device. A plurality of probes are positioned for respective alignment with an antenna of a corresponding radio module of the wireless access device. The plurality of probes are adapted to receive radio signals from the wireless access device.
    Type: Application
    Filed: January 7, 2011
    Publication date: July 12, 2012
    Inventors: Abraham Hartenstein, Ian A. Laity, Steven Smith, Andrew Little, Steven Krattiger
  • Patent number: RE43552
    Abstract: A priority encoder (PE) for a CAM, comprising a plurality of PE blocks, each receiving a plurality of match results corresponding to data entries in a corresponding data array block and, for determining an address of a highest priority data entry based on a physical location in the data array block during a CAM search-and-compare operation a register for storing a user defined priority value assigned to each PE block and means for evaluating priority values and the address determined by the plurality of PE blocks to select a PE block having the highest priority data entry.
    Type: Grant
    Filed: February 19, 2010
    Date of Patent: July 24, 2012
    Assignee: Mosaid Technologies Incorporated
    Inventors: Alan Roth, Sean Lord, Robert McKenzie, Dieter Haerle, Steven Smith