Patents by Inventor Steven B. Leeland

Steven B. Leeland has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4872133
    Abstract: A systolic array including chips having interface and timing and control circuitry and a plurality of processing elements. Each of the processing elements includes a floating-point serial processor and a plurality of data storage registers. The data storage registers in all of the elements communicate through a gridwork of data buses and all data registers and processing elements are programmed through a global bus. Software is simplified because algorithms are implemented directly in the new architecture.
    Type: Grant
    Filed: February 18, 1988
    Date of Patent: October 3, 1989
    Assignee: Motorola, Inc.
    Inventor: Steven B. Leeland