Patents by Inventor Steven Bodily

Steven Bodily has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9077305
    Abstract: Semiconductor dies and methods are described, such as those including a first capacitive pathway having a first effective series resistance (ESR) and a second capacitive pathway having an adjustable ESR. One such device provides for optimizing the semiconductor die for different operating conditions such as operating frequency. As a result, semiconductor dies can be manufactured in a single configuration for several different operating frequencies, and each die can be tuned to reduce (e.g. minimize) supply noise, such as by varying the ESR or the capacitance of at least one of the pathways.
    Type: Grant
    Filed: January 13, 2014
    Date of Patent: July 7, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Timothy M. Hollis, Steven Bodily
  • Publication number: 20140125424
    Abstract: Semiconductor dies and methods are described, such as those including a first capacitive pathway having a first effective series resistance (ESR) and a second capacitive pathway having an adjustable ESR. One such device provides for optimizing the semiconductor die for different operating conditions such as operating frequency. As a result, semiconductor dies can be manufactured in a single configuration for several different operating frequencies, and each die can be tuned to reduce (e.g. minimize) supply noise, such as by varying the ESR or the capacitance of at least one of the pathways.
    Type: Application
    Filed: January 13, 2014
    Publication date: May 8, 2014
    Applicant: Micron Technology, Inc.
    Inventors: Timothy M. Hollis, Steven Bodily
  • Patent number: 8629733
    Abstract: Semiconductor dies and methods are described, such as those including a first capacitive pathway having a first effective series resistance (ESR) and a second capacitive pathway having an adjustable ESR. One such device provides for optimizing the semiconductor die for different operating conditions such as operating frequency. As a result, semiconductor dies can be manufactured in a single configuration for several different operating frequencies, and each die can be tuned to reduce (e.g. minimize) supply noise, such as by varying the ESR or the capacitance of at least one of the pathways.
    Type: Grant
    Filed: August 20, 2010
    Date of Patent: January 14, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Timothy Hollis, Steven Bodily
  • Publication number: 20120044028
    Abstract: Semiconductor dies and methods are described, such as those including a first capacitive pathway having a first effective series resistance (ESR) and a second capacitive pathway having an adjustable ESR. One such device provides for optimizing the semiconductor die for different operating conditions such as operating frequency. As a result, semiconductor dies can be manufactured in a single configuration for several different operating frequencies, and each die can be tuned to reduce (e.g. minimize) supply noise, such as by varying the ESR or the capacitance of at least one of the pathways.
    Type: Application
    Filed: August 20, 2010
    Publication date: February 23, 2012
    Inventors: Timothy Hollis, Steven Bodily