Patents by Inventor Steven Brian SHAUCK
Steven Brian SHAUCK has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10083148Abstract: One embodiment describes a reciprocal quantum logic (RQL) receiver system. The RQL system is configured to convert a serial input data stream provided from a serial data transmitter into an RQL data stream. The RQL receiver system includes a sampling controller configured to oversample the serial input data stream via a plurality of samples over each sampling window of an RQL clock signal to determine a transition sample corresponding to a transition in a digital value of the serial input data stream in a given one sampling window of the RQL clock signal. The RQL receiver system can be further configured to capture the digital value of the serial input data stream via a capture sample that is a predetermined number of samples subsequent to the transition sample in each sampling window of the RQL clock signal.Type: GrantFiled: July 22, 2016Date of Patent: September 25, 2018Assignee: Northrop Grumman Systems CorporationInventor: Steven Brian Shauck
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Patent number: 10073677Abstract: Embodiments described herein are directed to mixed-radix carry-lookahead adders and methods performed thereby. The mixed-radix carry-lookahead adder includes an multiple carry-lookahead stages, where each stage may be of a different radix. Each stage operates on input bits, creating and implementing propagate and generate signals for each bit. The carry-lookahead stages also compute an XOR of the inputs that is forwarded to a final carry-lookahead stage. The elements of the initial and subsequent carry-lookahead stages are arranged such that each of the propagate and generate output signals passes through a minimal number of passive transmission lines. The final stage of the mixed-radix carry-lookahead adder includes an XOR logic gate configured to receive the generate output from an intermediate carry-lookahead stage and XOR the generate output received from the intermediate carry-lookahead stage with the computed XOR signal forwarded from the initial carry-lookahead stage to produce a sum of the input bits.Type: GrantFiled: June 16, 2015Date of Patent: September 11, 2018Assignee: Microsoft Technology Licensing, LLCInventors: Nathan Trent Josephsen, Steven Brian Shauck
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Publication number: 20180024961Abstract: One embodiment describes a reciprocal quantum logic (RQL) receiver system. The RQL system is configured to convert a serial input data stream provided from a serial data transmitter into an RQL data stream. The RQL receiver system includes a sampling controller configured to oversample the serial input data stream via a plurality of samples over each sampling window of an RQL clock signal to determine a transition sample corresponding to a transition in a digital value of the serial input data stream in a given one sampling window of the RQL clock signal. The RQL receiver system can be further configured to capture the digital value of the serial input data stream via a capture sample that is a predetermined number of samples subsequent to the transition sample in each sampling window of the RQL clock signal.Type: ApplicationFiled: July 22, 2016Publication date: January 25, 2018Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATIONInventor: STEVEN BRIAN SHAUCK
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Patent number: 9761305Abstract: One embodiment describes a quantum memory system. The system includes an array controller that comprises a plurality of flux pumps configured to provide write currents in a write operation and read currents in a read operation with respect to a plurality of quantum memory cells, the array controller being configured to control timing associated with the write operation and the read operation in response to memory request signals based on application of the write currents and the read currents and based on recharging flux associated with the plurality of flux pumps.Type: GrantFiled: June 1, 2016Date of Patent: September 12, 2017Assignee: Northrop Grumman Systems CorporationInventors: William Robert Reohr, Steven Brian Shauck, Donald Lynn Miller, Jeremy William Horner, Nathan Trent Josephsen
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Publication number: 20170229167Abstract: One embodiment describes a quantum memory system. The system includes an array controller that comprises a plurality of flux pumps configured to provide write currents in a write operation and read currents in a read operation with respect to a plurality of quantum memory cells, the array controller being configured to control timing associated with the write operation and the read operation in response to memory request signals based on application of the write currents and the read currents and based on recharging flux associated with the plurality of flux pumps.Type: ApplicationFiled: June 1, 2016Publication date: August 10, 2017Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATIONInventors: WILLIAM ROBERT REOHR, STEVEN BRIAN SHAUCK, DONALD LYNN MILLER, JEREMY WILLIAM HORNER, NATHAN TRENT JOSEPHSEN
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Publication number: 20160371058Abstract: Embodiments described herein are directed to mixed-radix carry-lookahead adders and methods performed thereby. The mixed-radix carry-lookahead adder includes an multiple carry-lookahead stages, where each stage may be of a different radix. Each stage operates on input bits, creating and implementing propagate and generate signals for each bit. The carry-lookahead stages also compute an XOR of the inputs that is forwarded to a final carry-lookahead stage. The elements of the initial and subsequent carry-lookahead stages are arranged such that each of the propagate and generate output signals passes through a minimal number of passive transmission lines. The final stage of the mixed-radix carry-lookahead adder includes an XOR logic gate configured to receive the generate output from an intermediate carry-lookahead stage and XOR the generate output received from the intermediate carry-lookahead stage with the computed XOR signal forwarded from the initial carry-lookahead stage to produce a sum of the input bits.Type: ApplicationFiled: June 16, 2015Publication date: December 22, 2016Inventors: Nathan Trent Josephsen, Steven Brian Shauck
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Patent number: 9466643Abstract: One example includes a superconducting circuit. The circuit includes a plurality of layers comprising a first conductor layer and a second conductor layer overlying the first conductor layer, each of the first and second conductor layers comprising at least one signal element. The circuit also includes a ground grid that is conductively coupled to ground and comprises a first plurality of parallel ground lines that occupy the first conductor layer and extend in a first direction and a second plurality of parallel ground lines that occupy the second conductor layer and extend in a second direction that is orthogonal with respect to the first direction.Type: GrantFiled: September 10, 2014Date of Patent: October 11, 2016Assignee: Northrop Grumman Systems CorporationInventors: Quentin P. Herr, Anna Y. Herr, Steven Brian Shauck, Eileen Jiwon Min
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Patent number: 9384827Abstract: One embodiment describes a quantum memory system. The system includes a plurality of quantum memory cells arranged in an array of rows and columns. Each of the plurality of quantum memory cells can be configured to store a binary logic state in response to write currents in a write operation and configured to provide an indication of the binary logic state in response to read currents in a read operation. The system also includes an array controller comprising a plurality of flux pumps configured to provide the write currents and the read currents with respect to the rows and columns. The array controller can be configured to control timing associated with the write operation and the read operation in response to memory request signals based on application of the write currents and the read currents and based on recharging flux associated with the plurality of flux pumps.Type: GrantFiled: March 5, 2015Date of Patent: July 5, 2016Assignee: Northrop Grumman Systems CorporationInventors: William Robert Reohr, Steven Brian Shauck, Donald Lynn Miller, Jeremy William Horner, Nathan Trent Josephsen
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Publication number: 20160071903Abstract: One example includes a superconducting circuit. The circuit includes a plurality of layers comprising a first conductor layer and a second conductor layer overlying the first conductor layer, each of the first and second conductor layers comprising at least one signal element. The circuit also includes a ground grid that is conductively coupled to ground and comprises a first plurality of parallel ground lines that occupy the first conductor layer and extend in a first direction and a second plurality of parallel ground lines that occupy the second conductor layer and extend in a second direction that is orthogonal with respect to the first direction.Type: ApplicationFiled: September 10, 2014Publication date: March 10, 2016Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATIONInventors: Quentin P. HERR, Anna Y. HERR, Steven Brian SHAUCK, Eileen Jiwon MIN