Abstract: An input protection circuit (IPC) may prevent an input signal from propagating into a system, such as an integrated circuit (IC), when the voltage level of the input signal exceeds a specified value. The IPC may be configured to compare the input signal voltage, which may be that of an external input signal received by the system, with a reference voltage, which may be the power supply voltage. If the input signal voltage exceeds the reference voltage, the output of the IPC may be set to the value of a specified clamp voltage. If the input signal voltage does not exceed the reference voltage, the output of the IPC may track (or follow) the input signal voltage. For certain integrated circuits, the IPC may be configured to provide circuit protection for an input signal voltage ranging between 0V to 5V, and a power supply voltage ranging between 3.0V and 3.6V.

Abstract: An integrated circuit may include one or more cells, with each cell comprising a first and a second input terminal, a first and a second output terminal, and a number of connection stages configured to couple each input terminal to a corresponding respective output terminal. The stages may include one stage per metal layer of the integrated circuit and one stage per VIA layer of the integrated circuit. Each stage may be configured with a pair of input ports and a pair of output ports. Each output port of a stage may serially connect to a corresponding respective input port of a first adjacent stage, and each input port of the stage may also serially connect to a corresponding respective output port of a second adjacent stage. The pair of input ports may also be configured to programmably connect to the pair of output ports within the same stage, according to one of two different connection patterns, to establish a respective connection within the stage.

Abstract: An integrated circuit may include one or more cells, with each cell comprising a first and a second input terminal, a first and a second output terminal, and a number of connection stages configured to couple each input terminal to a corresponding respective output terminal. The stages may include one stage per metal layer of the integrated circuit and one stage per VIA layer of the integrated circuit. Each stage may be configured with a pair of input ports and a pair of output ports. Each output port of a stage may serially connect to a corresponding respective input port of a first adjacent stage, and each input port of the stage may also serially connect to a corresponding respective output port of a second adjacent stage. The pair of input ports may also be configured to programmably connect to the pair of output ports within the same stage, according to one of two different connection patterns, to establish a respective connection within the stage.

Abstract: An input protection circuit (IPC) may prevent an input signal from propagating into a system, such as an integrated circuit (IC), when the voltage level of the input signal exceeds a specified value. The IPC may be configured to compare the input signal voltage, which may be that of an external input signal received by the system, with a reference voltage, which may be the power supply voltage. If the input signal voltage exceeds the reference voltage, the output of the IPC may be set to the value of a specified clamp voltage. If the input signal voltage does not exceed the reference voltage, the output of the IPC may track (or follow) the input signal voltage. For certain integrated circuits, the IPC may be configured to provide circuit protection for an input signal voltage ranging between 0V to 5V, and a power supply voltage ranging between 3.0V and 3.6V.

Abstract: A temperature sensor circuit and system providing accurate readings using a temperature diode whose ideality factor may fall within a determined range. In one set of embodiments a change in diode junction voltage (?VBE) proportional to the temperature of the diode is captured and provided to an ADC, which may perform required signal conditioning functions on ?VBE, and provide a numeric value output corresponding to the temperature of the diode. Errors in the measured temperature that might result from using diodes with ideality factors that differ from an expected ideality factor may be eliminated by programming the system to account for differing ideality factors. The gain of the temperature sensor may be matched to the ideality factor of the temperature diode by using an accurate, highly temperature stable reference voltage of the ADC to set the gain of the temperature measurement system.

Abstract: A method and apparatus for controlling a fan is disclosed. In one embodiment, a method for controlling a fan includes applying power to the fan at startup. The fan may be supplied a predetermined amount of current, which may break the inertia of the fan propeller and begin its rotation. As the propeller begins rotating, the speed at which it rotates may be monitored. The fan startup routine may continue until the fan reaches or exceeds a minimum fan speed threshold. Once the fan has at least reached the minimum speed, the amount of current supplied to the fan may be reduced such that the fan rotates at minimum speed, and an automatic fan control algorithm may begin executing. By reducing the current such that the fan operates at a minimum speed, the amount of audible noise generated by the fan during startup may be kept to a minimum level.

Abstract: A voltage reference is dynamically and digitally controlled by a digital function. The digital function may be implemented as a digital calculation or look up table. Inputs to the function include a modifiable trim value stored in a trim register, and a substrate temperature value. The preset value of the trim register is a trim preset value generated by cutting fuses and/or leaving fuses uncut. The cutting may be performed using laser trimming-devices. The output of the digital function is a corrected reference trim value that controls the gain of a voltage reference amplifier whose input is a band gap based voltage reference, and whose output is a derived voltage reference. The substrate temperature value is provided by a monolithic temperature monitor whose sensor may be on the same die as the derived voltage reference. The derived voltage reference provides a stable reference voltage that is dynamically and digitally controllable, to a host system that requires a voltage reference.

Abstract: A system and method for increasing resolution of pulse width modulated (PWM) signal duty cycle calculations in a fan speed control system operating to control rotational speed of at least one fan. The method may comprise obtaining a temperature reading from a first temperature sensor in the fan speed control system during a first time period. The temperature reading has resolution of a first number of bits. A portion of the first number of bits is selected for calculating a PWM signal duty cycle with the resolution of the first number of bits in the temperature reading using only the portion of the first number of bits and zone parameters associated with the first temperature sensor. The PWM signal duty cycle may then be converted into a PWM signal that may be provided to the at least one fan.

Abstract: A voltage reference is dynamically and digitally controlled by a digital function. The digital function may be implemented as a digital calculation or look up table. Inputs to the function include a modifiable trim value stored in a trim register, and a substrate temperature value. The preset value of the trim register is a trim preset value generated by cutting fuses and/or leaving fuses uncut. The cutting may be performed using laser trimming-devices. The output of the digital function is a corrected reference trim value that controls the gain of a voltage reference amplifier whose input is a band gap based voltage reference, and whose output is a derived voltage reference. The substrate temperature value is provided by a monolithic temperature monitor whose sensor may be on the same die as the derived voltage reference. The derived voltage reference provides a stable reference voltage that is dynamically and digitally controllable, to a host system that requires a voltage reference.

Abstract: A method and apparatus for controlling a fan is disclosed. In one embodiment, a method for controlling a fan includes applying power to the fan at startup. The fan may be supplied a predetermined amount of current, which may break the inertia of the fan propeller and begin its rotation. As the propeller begins rotating, the speed at which it rotates may be monitored. The fan startup routine may continue until the fan reaches or exceeds a minimum fan speed threshold. Once the fan has at least reached the minimum speed, the amount of current supplied to the fan may be reduced such that the fan rotates at minimum speed, and an automatic fan control algorithm may begin executing. By reducing the current such that the fan operates at a minimum speed, the amount of audible noise generated by the fan during startup may be kept to a minimum level.

Abstract: A comprehensive power-on-reset (POR) and low voltage detection circuit combines a Power Supply Voltage Level Detection (PSVLD) circuit with an Enhanced Retriggering (ER) circuit. The PSVLD circuit establishes lower and upper thresholds of the desired operating voltage range, and provides initial POR triggering and retriggering when the supply voltage is within the desired range. The ER circuit senses a predetermined amount of drop in the power supply voltage being monitored, and generates an independent pulse at the POR node whenever such a drop occurs. Total DC current is limited to less than 2.5 microamps, while power supply voltages can be monitored over the range of 2.5 to 5.5 volts.A simplified POR and low voltage detection circuit establishes a single threshold and generates an initial POR signal when the supply voltage exceeds this threshold. The low voltage detection circuit causes a retrigger POR signal to be generated if the supply voltage then falls below this threshold.

Abstract: A method is disclosed for giving a host CPU direct access to the address space of an embedded microprocessor in a multifunction controller. The data path of the multifunction controller chip is modified to enable this direct access.

Abstract: A comprehensive power-on-reset (POR) and low voltage detection circuit combines a Power Supply Voltage Level Detection (PSVLD) circuit with an Enhanced Retriggering (ER) circuit. The PSVLD circuit establishes lower and upper thresholds of the desired operating voltage range, and provide initial POR triggering and retriggering when the supply voltage is within the desired range. The ER circuit senses a predetermined amount of drop in the power supply voltage being monitored, and generates an independent pulse at the POR node whenever such a drop occurs. Total DC current is limited to less than 2.5 microamps, while power supply voltages can be monitored for stability over the range of 2.5 to 5.5 volts.

Abstract: An output buffer circuit for supplying a current to an output pad of an integrated circuit comprises an output driver circuit and a feedback circuit. The output driver circuit includes a first current supply element for supplying a small current to the output pad in response to an input logic signal. The feedback circuit includes a second current supply element for supplying a large current to the output pad and a circuit for generating a feedback voltage to control the second current supply element. The feedback voltage is responsive to the input logic signal and inversely follows the output pad voltage when the output pad voltage crosses a threshold. The output buffer provides excellent short circuit protection.

Abstract: A monostable multivibrator includes a pair of MOSFETS (34, 42) electrically coupled to an input node (12) and a MOS logic gate which has one input coupled to this node and another input adapted to receive a delayed signal from another node (38). The MOSFETS are configured to hold node 38 at ground and keep the input MOSFET of the logic gate electrically isolated from the means used to generate the delayed signal thereby enabling the output MOSFET of the logic gate to charge its output efficiently with respect to time.