Abstract: Methods of operating a ferroelectric memory cell. The method includes applying one of a positive bias voltage and a negative bias voltage to a ferroelectric memory cell having a capacitor including a top electrode, a bottom electrode, a ferroelectric material between the top electrode and the bottom electrode, and an interfacial material between the ferroelectric material and one of the top electrode and the bottom electrode. Another of the positive bias voltage and the negative bias voltage is applied to the ferroelectric memory cell to switch a polarization of the ferroelectric memory cell, wherein an absolute value of the negative bias voltage is different from an absolute value of the positive bias voltage. Related ferroelectric memory cells include a ferroelectric material exhibiting asymmetric switching properties.

Abstract: Methods of operating a ferroelectric memory cell. The method comprises applying one of a positive bias voltage and a negative bias voltage to a ferroelectric memory cell comprising a capacitor including a top electrode, a bottom electrode, a ferroelectric material between the top electrode and the bottom electrode, and an interfacial material between the ferroelectric material and one of the top electrode and the bottom electrode. The method further comprises applying another of the positive bias voltage and the negative bias voltage to the ferroelectric memory cell to switch a polarization of the ferroelectric memory cell, wherein an absolute value of the negative bias voltage is different from an absolute value of the positive bias voltage. Ferroelectric memory cells are also described.

Abstract: Methods of operating a ferroelectric memory cell. The method comprises applying one of a positive bias voltage and a negative bias voltage to a ferroelectric memory cell comprising a capacitor including a top electrode, a bottom electrode, a ferroelectric material between the top electrode and the bottom electrode, and an interfacial material between the ferroelectric material and one of the top electrode and the bottom electrode. The method further comprises applying another of the positive bias voltage and the negative bias voltage to the ferroelectric memory cell to switch a polarization of the ferroelectric memory cell, wherein an absolute value of the negative bias voltage is different from an absolute value of the positive bias voltage. Ferroelectric memory cells are also described.

Abstract: Methods of operating a ferroelectric memory cell. The method comprises applying one of a positive bias voltage and a negative bias voltage to a ferroelectric memory cell comprising a capacitor including a top electrode, a bottom electrode, a ferroelectric material between the top electrode and the bottom electrode, and an interfacial material between the ferroelectric material and one of the top electrode and the bottom electrode. The method further comprises applying another of the positive bias voltage and the negative bias voltage to the ferroelectric memory cell to switch a polarization of the ferroelectric memory cell, wherein an absolute value of the negative bias voltage is different from an absolute value of the positive bias voltage. Ferroelectric memory cells are also described.

Abstract: Methods of operating a ferroelectric memory cell. The method comprises applying one of a positive bias voltage and a negative bias voltage to a ferroelectric memory cell comprising a capacitor including a top electrode, a bottom electrode, a ferroelectric material between the top electrode and the bottom electrode, and an interfacial material between the ferroelectric material and one of the top electrode and the bottom electrode. The method further comprises applying another of the positive bias voltage and the negative bias voltage to the ferroelectric memory cell to switch a polarization of the ferroelectric memory cell, wherein an absolute value of the negative bias voltage is different from an absolute value of the positive bias voltage. Ferroelectric memory cells are also described.

Abstract: Methods of operating a ferroelectric memory cell. The method comprises applying one of a positive bias voltage and a negative bias voltage to a ferroelectric memory cell comprising a capacitor including a top electrode, a bottom electrode, a ferroelectric material between the top electrode and the bottom electrode, and an interfacial material between the ferroelectric material and one of the top electrode and the bottom electrode. The method further comprises applying another of the positive bias voltage and the negative bias voltage to the ferroelectric memory cell to switch a polarization of the ferroelectric memory cell, wherein an absolute value of the negative bias voltage is different from an absolute value of the positive bias voltage. Ferroelectric memory cells are also described.

Abstract: Methods of operating a ferroelectric memory cell. The method comprises applying one of a positive bias voltage and a negative bias voltage to a ferroelectric memory cell comprising a capacitor including a top electrode, a bottom electrode, a ferroelectric material between the top electrode and the bottom electrode, and an interfacial material between the ferroelectric material and one of the top electrode and the bottom electrode. The method further comprises applying another of the positive bias voltage and the negative bias voltage to the ferroelectric memory cell to switch a polarization of the ferroelectric memory cell, wherein an absolute value of the negative bias voltage is different from an absolute value of the positive bias voltage. Ferroelectric memory cells are also described.

Abstract: Methods of operating a ferroelectric memory cell. The method comprises applying one of a positive bias voltage and a negative bias voltage to a ferroelectric memory cell comprising a capacitor including a top electrode, a bottom electrode, a ferroelectric material between the top electrode and the bottom electrode, and an interfacial material between the ferroelectric material and one of the top electrode and the bottom electrode. The method further comprises applying another of the positive bias voltage and the negative bias voltage to the ferroelectric memory cell to switch a polarization of the ferroelectric memory cell, wherein an absolute value of the negative bias voltage is different from an absolute value of the positive bias voltage. Ferroelectric memory cells are also described.

Abstract: Methods of operating a ferroelectric memory cell. The method comprises applying one of a positive bias voltage and a negative bias voltage to a ferroelectric memory cell comprising a capacitor including a top electrode, a bottom electrode, a ferroelectric material between the top electrode and the bottom electrode, and an interfacial material between the ferroelectric material and one of the top electrode and the bottom electrode. The method further comprises applying another of the positive bias voltage and the negative bias voltage to the ferroelectric memory cell to switch a polarization of the ferroelectric memory cell, wherein an absolute value of the negative bias voltage is different from an absolute value of the positive bias voltage. Ferroelectric memory cells are also described.

Abstract: Methods of operating a ferroelectric memory cell. The method comprises applying one of a positive bias voltage and a negative bias voltage to a ferroelectric memory cell comprising a capacitor including a top electrode, a bottom electrode, a ferroelectric material between the top electrode and the bottom electrode, and an interfacial material between the ferroelectric material and one of the top electrode and the bottom electrode. The method further comprises applying another of the positive bias voltage and the negative bias voltage to the ferroelectric memory cell to switch a polarization of the ferroelectric memory cell, wherein an absolute value of the negative bias voltage is different from an absolute value of the positive bias voltage. Ferroelectric memory cells are also described.

Abstract: Embodiments of the invention relate to an electro-optic device comprising a first region of silicon semiconductor material and a second region of III-V semiconductor material. A waveguide of the optical device is formed in part by a ridge in the second region. An optical mode of the waveguide is laterally confined by the ridge of the second region and vertically confined by a vertical boundary included in the first region. The ridge structure further serves as a current confinement structure over the active region of the electro-optic device, eliminating the need for implantation or other structures that are known to present reliability problems during manufacturing. The lack of “voids” and implants in electro-optic devices according to embodiments of the invention leads to better device reliability, process repeatability and improved mechanical strength.

Abstract: Embodiments of the invention relate to an electro-optic device comprising a first region of silicon semiconductor material and a second region of III-V semiconductor material. A waveguide of the optical device is formed in part by a ridge in the second region. An optical mode of the waveguide is laterally confined by the ridge of the second region and vertically confined by a vertical boundary included in the first region. The ridge structure further serves as a current confinement structure over the active region of the electro-optic device, eliminating the need for implantation or other structures that are known to present reliability problems during manufacturing. The lack of “voids” and implants in electro-optic devices according to embodiments of the invention leads to better device reliability, process repeatability and improved mechanical strength.

Abstract: Embodiments of the invention relate to an electro-optic device comprising a first region of silicon semiconductor material and a second region of III-V semiconductor material. A waveguide of the optical device is formed in part by a ridge in the second region. An optical mode of the waveguide is laterally confined by the ridge of the second region and vertically confined by a vertical boundary included in the first region. The ridge structure further serves as a current confinement structure over the active region of the electro-optic device, eliminating the need for implantation or other structures that are known to present reliability problems during manufacturing. The lack of “voids” and implants in electro-optic devices according to embodiments of the invention leads to better device reliability, process repeatability and improved mechanical strength.