Abstract: A ladder having a foot having a plastic body with a recess which receives the end of a first rail and is positioned about and conforms to the web and the first and second flanges of the first rail. The foot has a plastic base having a top side from which the body extends. The base has a front edge. The foot has a metal rail fastener which extends through the body and the rail to attach the body and the rail together. The foot has a pad having a rigid plate with a rubber outer layer surrounding the rigid plate and a pad fastener hole that extends entirely through the rigid plate and rubber outer layer, the outer layer of the pad having a bottom with treads. The foot has a metal pad fastener that extends entirely through the pad and entirely through the base to attach the pad to the base so the rigid plate is between the treads and the base of the shell. A ladder foot. A method.

Abstract: A charging handle assembly for a firearm includes: a charging handle frame having a forward end configured for insertion into an upper receiver of a firearm, a central portion connected to and extending rearward from the forward end, and a base extending rearward from the central portion; a latch arm having a forward hook, the latch arm attached to the central portion of the charging handle frame, the forward hook biased toward the central portion of the charging handle frame to secure the charging handle frame relative to an upper receiver of a firearm; and a cheek rest attached to the base of the charging handle frame. The latch arm is configured to releasably engage the upper receiver of a firearm when the cheek rest is pushed forward and to disengage the upper receiver of the firearm when the cheek rest is pulled rearward.

Abstract: An apparatus and method for dynamically allocating memory between inbound and outbound paths of a networking protocol handler so as to optimize the ratio of a given amount of memory between the inbound and outbound buffers is presented. Dedicated but sharable buffer memory is provided for both the inbound and outbound processors of a computer network. Buffer memory is managed so as to dynamically alter what portion of memory is used to receive and store incoming data packets or to transmit outgoing data packets. Use of the present invention reduces throttling of data rate transmissions and other memory access bottlenecks associated with conventional fixed-memory network systems.

Abstract: An apparatus and method for dynamically allocating memory between inbound and outbound paths of a networking protocol handler so as to optimize the ratio of a given amount of memory between the inbound and outbound buffers is presented. Dedicated but sharable buffer memory is provided for both the inbound and outbound processors of a computer network. Buffer memory is managed so as to dynamically alter what portion of memory is used to receive and store incoming data packets or to transmit outgoing data packets. Use of the present invention reduces throttling of data rate transmissions and other memory access bottlenecks associated with conventional fixed-memory network systems.

Abstract: An apparatus and method for dynamically allocating memory between inbound and outbound paths of a networking protocol handler so as to optimize the ratio of a given amount of memory between the inbound and outbound buffers is presented. Dedicated but sharable buffer memory is provided for both the inbound and outbound processors of a computer network. Buffer memory is managed so as to dynamically alter what portion of memory is used to receive and store incoming data packets or to transmit outgoing data packets. Use of the present invention reduces throttling of data rate transmissions and other memory access bottlenecks associated with conventional fixed-memory network systems.

Abstract: An apparatus and method for dynamically allocating memory between inbound and outbound paths of a networking protocol handler so as to optimize the ratio of a given amount of memory between the inbound and outbound buffers is presented. Dedicated but sharable buffer memory is provided for both the inbound and outbound processors of a computer network. Buffer memory is managed so as to dynamically alter what portion of memory is used to receive and store incoming data packets or to transmit outgoing data packets. Use of the present invention reduces throttling of data rate transmissions and other memory access bottlenecks associated with conventional fixed-memory network systems.

Abstract: The present invention involves a filter element assembly (10), which is useful in removing undissolved adhesive bodies from oil. The assembly includes at least one cylindrical body 11 of principal filter medium for removing particulates from oil. Body 11 has an inlet end and an outlet end. A secondary filter medium 20 for removing undissolved adhesive bodies from the oil is located around the sides and across the inlet end of the principle medium (11). A flow affording spacer 926) is disposed between the sides and the inlet end of the principal medium (11). A preferred spacer (26) is a non-woven expandible mesh present in a partially expanded state and having elements (27,28) grouped in first and second sets in which the elements (27) in the first set are laid atop the elements (28) in the second set. A readily cleanable containment vessel (39) for the filter element assembly (10) includes a tubular body (41) which is releasably connectible in liquid tight relation to a bottom cover (44) for the body (41).

Abstract: An apparatus and method for dynamically allocating memory between inbound and outbound paths of a networking protocol handler so as to optimize the ratio of a given amount of memory between the inbound and outbound buffers is presented. Dedicated but sharable buffer memory is provided for both the inbound and outbound processors of a computer network. Buffer memory is managed so as to dynamically alter what portion of memory is used to receive and store incoming data packets or to transmit outgoing data packets. Use of the present invention reduces throttling of data rate transmissions and other memory access bottlenecks associated with conventional fixed-memory network systems.

Abstract: An on-chip logic analysis (OCLA) system captures data processed by a signal processing logic core embedded in a single-chip-device (SOC) without interrupting operations of the signal processing logic core. The OCLA system includes a data capturing unit embedded in the SOC device to monitor the operations of the signal processing unit and determines whether the operations satisfy predetermined trigger conditions. Once the trigger condition is satisfied, the data capturing unit captures internal data from/to the signal processing unit and transfers to an external host system. The host system controls the operations of the data capturing unit. The host system provides the captured data to an user interface for testing and debugging the operations of the SOC signal processing device.

Abstract: An apparatus and method for dynamically allocating memory between inbound and outbound paths of a networking protocol handler so as to optimize the ratio of a given amount of memory between the inbound and outbound buffers is presented. Dedicated but sharable buffer memory is provided for both the inbound and outbound processors of a computer network. Buffer memory is managed so as to dynamically alter what portion of memory is used to receive and store incoming data packets or to transmit outgoing data packets. Use of the present invention reduces throttling of data rate transmissions and other memory access bottlenecks associated with conventional fixed-memory network systems.

Abstract: The present invention involves a filter element assembly (10), which is useful in removing undissolved adhesive bodies from oil. The assembly includes at least one cylindrical body 11 of principal filter medium for removing particulates from oil. Body 11 has an inlet end and an outlet end. A secondary filter medium 20 for removing undissolved adhesive bodies from the oil is located around the sides and across the inlet end of the principle medium (11). A flow affording spacer 926) is disposed between the sides and the inlet end of the principal medium (11). A preferred spacer (26) is a non-woven expandible mesh present in a partially expanded state and having elements (27,28) grouped in first and second sets in which the elements (27) in the first set are laid atop the elements (28) in the second set. A readily cleanable containment vessel (39) for the filter element assembly (10) includes a tubular body (41) which is releasably connectible in liquid tight relation to a bottom cover (44) for the body (41).

Abstract: An apparatus and method for dynamically allocating memory between inbound and outbound paths of a networking protocol handler so as to optimize the ratio of a given amount of memory between the inbound and outbound buffers is presented. Dedicated but sharable buffer memory is provided for both the inbound and outbound processors of a computer network. Buffer memory is managed so as to dynamically alter what portion of memory is used to receive and store incoming data packets or to transmit outgoing data packets. Use of the present invention reduces throttling of data rate transmissions and other memory access bottlenecks associated with conventional fixed-memory network systems.

Abstract: An on-chip logic analysis (OCLA) system captures data processed by a signal processing logic core embedded in a single-chip-device (SOC) without interrupting operations of the signal processing logic core. The OCLA system includes a data capturing unit embedded in the SOC device to monitor the operations of the signal processing unit and determines whether the operations satisfy predetermined trigger conditions. Once the trigger condition is satisfied, the data capturing unit captures internal data from/to the signal processing unit and transfers to an external host system. The host system controls the operations of the data capturing unit. The host system provides the captured data to an user interface for testing and debugging the operations of the SOC signal processing device.

Abstract: A process for manufacturing floor and wall coverings that produces a product a user may adhere to any wall or floor surface. The process begins by blending selected volumes of epoxy and aggregate into a vessel. A selected portion of the blended mixture is poured into a mold of selected geometry. A first piece of interlocking screening material is positioned over the first selected portion of the blended mixture. A second selected portion of the blended mixture is poured over the first interlocking screening material. A second piece of interlocking screening material is positioned over the second selected portion of the blended mixture. A selected portion of an adhering material is embedded into the top surface of the second interlocking screening material and the second selected portion of the blended molded mixture. The mold is cured and the product is released from the mold.

Abstract: A bag type device (2) for extracting water from oil includes a bag (3) with an outer layer of felt (20) lined by at least one layer (22) of water absorbing laminate. The interior of the bag is composed of a plurality of slit sheets of water absorbing laminate forming a plurality of finger-like strips (35) depending from adjacent the top of the bag. The strips are preferably longer than the length of the bag. The bag and the water-absorbing layers within the bag are supported by a wire ring (30) stitched into a hem around the open upper end of the bag. As oil is passed through the bag, the finger-like strips provide an increased surface area for absorption of water from the oil. The strips can expand inwardly and toward the oil flow to prevent back-pressure build up within the bag.