Abstract: Disclosed herein are glass pharmaceutical vials having sidewalls of reduced thickness. In embodiments, the glass pharmaceutical vial may include a glass body comprising a sidewall enclosing an interior volume. An outer diameter D of the glass body is equal to a diameter d1 of a glass vial of size X as defined by ISO 8362-1, wherein X is one of 2R, 3R, 4R, 6R, 8R, 10R, 15R, 20R, 25R, 30R, 50R, and 100R as defined by ISO 8362-1. However, the sidewall of the glass pharmaceutical vial comprises an average wall thickness Ti that is less than or equal to 0.85*s1, wherein s1 is a wall thickness of the glass vial of size X as defined by ISO 8362-1 and X is one of 2R, 3R, 4R, 6R, 8R, 10R, 15R, 20R, 25R, 30R, 50R, and 100R as defined by ISO 8362-1.

Abstract: Disclosed herein are glass pharmaceutical vials having sidewalls of reduced thickness. In embodiments, the glass pharmaceutical vial may include a glass body comprising a sidewall enclosing an interior volume. An outer diameter D of the glass body is equal to a diameter d1 of a glass vial of size X as defined by ISO 8362-1, wherein X is one of 2R, 3R, 4R, 6R, 8R, 10R, 15R, 20R, 25R, 30R, 50R, and 100R as defined by ISO 8362-1. However, the sidewall of the glass pharmaceutical vial comprises an average wall thickness Ti that is less than or equal to 0.85*s1, wherein s1 is a wall thickness of the glass vial of size X as defined by ISO 8362-1 and X is one of 2R, 3R, 4R, 6R, 8R, 10R, 15R, 20R, 25R, 30R, 50R, and 100R as defined by ISO 8362-1.

Abstract: The invention relates to bacterial strains, particularly for use in the field of vaccines, in particular to the field of the prevention or treatment of infections caused by bacterium of the Bordetella genus.

Abstract: The invention provides proteins and compositions for the treatment and prevention of disease caused by Bordetella pertussis.

Abstract: A circuit design method and transmitter that enables flexible control of amplitude, pre- emphasis, and slew rate utilizing a design of a segmented self-series terminated (SSST) transmitter having a parallel configuration of multiple, individually controllable segments of dual pull-up and pull-down transistors. Amplitude control, slew rate control and pre-emphasis control are enabled by manipulation/selection of normal or inverted inputs for the various segments. Also provided is a mechanism for providing/maintaining accurate output across a self-series terminated (SST) transmitter by regulating the supply voltage. Regulation of the supply voltage allows compatibility with conventional serial link receiver termination voltages and protects the transmitter output devices when those voltages are larger than the normal supply for the devices.

Abstract: Substantially-accurate calibration of output impedance of a device-under-test (DUT) to within a predetermined range of allowable impedance. The DUT is part of a source series terminated (SST) serial link transmitter, in which two branches of parallel transistors each provide an impedance value when particular transistors of the parallel branch are turned on. The impedance value is added to a series-connected resistor to provide the output impedance. The DUT consists of one branch of parallel transistors in series with a resistor. Output impedance of the DUT is compared to the resistance of a reference resistor, and the comparator provides a control signal based on whether the output impedance falls within the pre-set percentage variance of the reference resistance. The control signal is processed by a FSM (finite state machine) that individually turns on or off the transistors within the parallel branch until the DUT impedance value falls within the desired range.

Abstract: A high speed serial link structure and method are provided, comprising a data driver and a replica driver structure, the replica driver structure comprising a replica driver, a calibration engine and a peak level detector. The calibration engine compares a peak level detector output to a reference value and responsively performs a data driver adjustment, wherein the data driver adjustment comprises at least one of a driver biasing adjustment, a driver intermediate stage bandwidth adjustment and a driver equalization setting adjustment. In some embodiments, the calibration engine incorporates a comparator and a digital state machine; in other embodiments, it incorporates an analog operational amplifier.

Abstract: A high speed serial data communication system includes provisions for the correction of equalization errors, particularly those errors introduced by equalizer non-idealities. The equalization is achieved at the data transmitter, and is based on dynamic current subtraction at the output of a differential pair. When bit time>0, the error current is removed or subtracted from the total driver current, thereby maintaining a constant total current from bit time 0 to bit time>0. The same result can also be achieved by subtracting current when bit time>0 using field effect transistors of the opposite gender. The error current can be determined empirically from simulation or through feedback using a replica of the driver. The circuits for achieving equalization error correction and the resulting electrical network analysis are shown and described.

Abstract: Aspects of saving power in a serial link transmitter are described. The aspects include providing a parallel arrangement of segments, each segment comprising prebuffer and output stage circuitry of the serial link transmitter and each segment enabled independently to achieve multiple power levels and multiple levels of pre-emphasis while maintaining a substantially constant propagation delay in a signal path of the serial link transmitter. Further aspects include providing a bypass path in the prebuffer stage circuitry to implement a controllable idle state in the segments and tail current and resistive load elements in the prebuffer circuitry as sectioned portions for slew rate control capability. Also included is provision of a control element with pre-emphasis delay circuitry in the transmitter signal path to allow inversion of a last delayed bit of the pre-emphasis delay circuitry to achieve a polarity change of a pre-emphasis weight.

Abstract: A mobile system for recovering materials from construction waste or demolition debris is provided. The system includes a mobile wheeled chassis that has at least one picking station. A grapple is mounted on the wheeled chassis for selectively retrieving waste or debris from a jobsite. A screen is disposed on the wheeled chassis and is configured to receive the waste or debris from the grapple. The screen sorts the waste or debris into fines and oversized material. A conveyor transports the oversized material adjacent to at least one picking station to allow selected materials to be removed for further processing.

Abstract: A goal structure for use in the playing of miniature hockey includes a housing having side walls, with at least one of the side walls including an opening, and the opening including a cushion perimeter to minimize uncontrolled deflection of the hockey projectile, with a cushion mounted to a top wall of the housing to accommodate an individual thereon.