Patents by Inventor Steven Consiglio

Steven Consiglio has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230326764
    Abstract: A method of forming a device includes providing a substrate containing an exposed semiconductor region, forming a metal oxide film over the exposed semiconductor region, and forming an oxygen-scavenging metal film over the metal oxide film. The method includes chemically reducing the metal oxide film to an elemental metal film by scavenging oxygen from the metal oxide film into the oxygen-scavenging metal film; and reacting the elemental metal film with the semiconductor region to form a metal-semiconductor layer, the metal-semiconductor layer forming a source/drain contact region of a transistor.
    Type: Application
    Filed: April 4, 2023
    Publication date: October 12, 2023
    Inventors: Robert D. Clark, Steven Consiglio
  • Patent number: 11700778
    Abstract: A method of controlling the forming voltage of a dielectric film in a resistive random access memory (ReRAM) device. The method includes depositing a dielectric film contains intrinsic defects on a substrate, forming a plasma-excited treatment gas containing H2 gas, and exposing the dielectric film to the plasma-excited treatment gas to create additional defects in the dielectric film without substantially changing a physical thickness of the dielectric film, where the additional defects lower the forming voltage needed for generating an electrically conducting filament across the dielectric film. The dielectric film can include a metal oxide film and the plasma-excited treatment gas may be formed using a microwave plasma source.
    Type: Grant
    Filed: April 9, 2021
    Date of Patent: July 11, 2023
    Assignee: Tokyo Electron Limited
    Inventors: Steven Consiglio, Cory Wajda, Kandabara Tapily, Takaaki Tsunomura, Takashi Ando, Paul C. Jamison, Eduard A. Cartier, Vijay Narayanan, Marinus J. P. Hopstaken
  • Publication number: 20220223608
    Abstract: Bilayer stack for a ferroelectric tunnel junction and method of forming. The method includes depositing a first metal oxide film on a substrate by performing a first plurality of cycles of atomic layer deposition, where the first metal oxide film contains hafnium oxide, zirconium oxide, or both hafnium oxide and zirconium oxide, depositing a second metal oxide film on the substrate by performing a second plurality of cycles of atomic layer deposition, where the second metal oxide film contains hafnium oxide and zirconium oxide, and has a different hafnium oxide and zirconium oxide content than the first metal oxide film, and heat-treating the substrate to form a ferroelectric phase in the second metal oxide film but not in the first metal oxide film. A ferroelectric tunnel junction includes a first metal-containing electrode, the first metal oxide film, the second metal oxide film, and a second metal-containing electrode.
    Type: Application
    Filed: March 29, 2022
    Publication date: July 14, 2022
    Inventors: Steven Consiglio, Kandabara Tapily, Robert Clark, Dina Triyoso
  • Publication number: 20210234096
    Abstract: A method of controlling the forming voltage of a dielectric film in a resistive random access memory (ReRAM) device. The method includes depositing a dielectric film contains intrinsic defects on a substrate, forming a plasma-excited treatment gas containing H2 gas, and exposing the dielectric film to the plasma-excited treatment gas to create additional defects in the dielectric film without substantially changing a physical thickness of the dielectric film, where the additional defects lower the forming voltage needed for generating an electrically conducting filament across the dielectric film. The dielectric film can include a metal oxide film and the plasma-excited treatment gas may be formed using a microwave plasma source.
    Type: Application
    Filed: April 9, 2021
    Publication date: July 29, 2021
    Inventors: Steven Consiglio, Cory Wajda, Kandabara Tapily, Takaaki Tsunomura, Takashi Ando, Paul C. Jamison, Eduard A. Cartier, Vijay Narayanan, Marinus J.P. Hopstaken
  • Patent number: 10991881
    Abstract: A method of controlling the forming voltage of a dielectric film in a resistive random access memory (ReRAM) device. The method includes depositing a dielectric film contains intrinsic defects on a substrate, forming a plasma-excited treatment gas containing H2 gas, and exposing the dielectric film to the plasma-excited treatment gas to create additional defects in the dielectric film without substantially changing a physical thickness of the dielectric film, where the additional defects lower the forming voltage needed for generating an electrically conducting filament across the dielectric film. The dielectric film can include a metal oxide film and the plasma-excited treatment gas may be formed using a microwave plasma source.
    Type: Grant
    Filed: May 31, 2019
    Date of Patent: April 27, 2021
    Assignee: Tokyo Electron Limited
    Inventors: Steven Consiglio, Cory Wajda, Kandabara Tapily, Takaaki Tsunomura, Takashi Ando, Paul C. Jamison, Eduard A. Cartier, Vijay Narayanan, Marinus J. P. Hopstaken
  • Publication number: 20200381624
    Abstract: A method of controlling the forming voltage of a dielectric film in a resistive random access memory (ReRAM) device. The method includes depositing a dielectric film contains intrinsic defects on a substrate, forming a plasma-excited treatment gas containing H2 gas, and exposing the dielectric film to the plasma-excited treatment gas to create additional defects in the dielectric film without substantially changing a physical thickness of the dielectric film, where the additional defects lower the forming voltage needed for generating an electrically conducting filament across the dielectric film. The dielectric film can include a metal oxide film and the plasma-excited treatment gas may be formed using a microwave plasma source.
    Type: Application
    Filed: May 31, 2019
    Publication date: December 3, 2020
    Inventors: Steven Consiglio, Cory Wajda, Kandabara Tapily, Takaaki Tsunomura, Takashi Ando, Paul C. Jamison, Eduard A. Cartier, Vijay Narayanan, Marinus J.P. Hopstaken
  • Patent number: 9607888
    Abstract: Methods for integration of atomic layer deposition (ALD) of barrier layers and chemical vapor deposition (CVD) of Ru liners for Cu filling of narrow recessed features for semiconductor devices are disclosed in several embodiments. According to one embodiment, the method includes providing a substrate containing a recessed feature, depositing a conformal barrier layer by ALD in the recessed feature, where the barrier layer contains TaN or TaAlN, depositing a conformal Ru liner by CVD on the barrier layer, and filling the recessed feature with Cu metal.
    Type: Grant
    Filed: February 3, 2015
    Date of Patent: March 28, 2017
    Assignee: Tokyo Electron Limited
    Inventors: Kai-Hung Yu, Toshio Hasegawa, Tadahiro Ishizaka, Manabu Oie, Fumitaka Amano, Steven Consiglio, Cory Wajda, Kaoru Maekawa, Gert J. Leusink
  • Publication number: 20150221550
    Abstract: Methods for integration of atomic layer deposition (ALD) of barrier layers and chemical vapor deposition (CVD) of Ru liners for Cu filling of narrow recessed features for semiconductor devices are disclosed in several embodiments. According to one embodiment, the method includes providing a substrate containing a recessed feature, depositing a conformal barrier layer by ALD in the recessed feature, where the barrier layer contains TaN or TaAlN, depositing a conformal Ru liner by CVD on the barrier layer, and filling the recessed feature with Cu metal.
    Type: Application
    Filed: February 3, 2015
    Publication date: August 6, 2015
    Inventors: Kai-Hung Yu, Toshio Hasegawa, Tadahiro Ishizaka, Manabu Oie, Fumitaka Amano, Steven Consiglio, Cory Wajda, Kaoru Maekawa, Gert J. Leusink