Patents by Inventor Steven D. Cummings
Steven D. Cummings has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7943505Abstract: A four layer interconnect structure is disclosed which includes a bottom conductive reactive layer such as titanium, a conductive barrier layer, such as titanium nitride, a conductive layer, such as aluminum-copper alloy, and a top conductive barrier layer, such as titanium nitride. The interconnection structure can be fabricated using conventional sputter deposition technology. The resulting interconnection structure provides a highly conductive thin film structure that provides good contact to tungsten plugs with small contact dimensions, good patternability on fine lines, and good reliability.Type: GrantFiled: June 18, 2004Date of Patent: May 17, 2011Assignee: Micron Technology, Inc.Inventors: Howard E. Rhodes, Steven D. Cummings
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Patent number: 7271413Abstract: The invention includes semiconductor constructions containing vertically-extending pillars, and methods for forming such constructions. The vertically-extending pillars can be incorporated into transistor devices, and can contain vertically-extending channel regions of the transistor devices. The transistor devices can be incorporated into integrated circuitry, and in some aspects are incorporated into memory constructions, such as, for example, dynamic random access memory (DRAM) constructions.Type: GrantFiled: November 14, 2005Date of Patent: September 18, 2007Assignee: Micron Technology, Inc.Inventors: Randal W. Chance, Gordon A. Haller, Sanh D. Tang, Steven D. Cummings
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Patent number: 7253102Abstract: An enhanced-surface-area conductive layer compatible with high-dielectric constant materials is created by forming a film or layer having at least two phases, at least one of which is electrically conductive. The film may be formed in any convenient manner, such as by chemical vapor deposition techniques, which may be followed by an anneal to better define and/or crystallize the at least two phases. The film may be formed over an underlying conductive layer. At least one of the at least two phases is selectively removed from the film, such as by an etch process that preferentially etches at least one of the at least two phases so as to leave at least a portion of the electrically conductive phase. Ruthenium and ruthenium oxide, both conductive, may be used for the two or more phases. Iridium and its oxide, rhodium and its oxide, and platinum and platinum-rhodium may also be used. A wet etchant comprising ceric ammonium nitrate and acetic acid may be used.Type: GrantFiled: June 2, 2004Date of Patent: August 7, 2007Assignee: Micron Technology, Inc.Inventors: Cem Basceri, Mark Visokay, Thomas M. Graettinger, Steven D. Cummings
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Patent number: 7122425Abstract: The invention includes semiconductor constructions containing vertically-extending pillars, and methods for forming such constructions. The vertically-extending pillars can be incorporated into transistor devices, and can contain vertically-extending channel regions of the transistor devices. The transistor devices can be incorporated into integrated circuitry, and in some aspects are incorporated into memory constructions, such as, for example, dynamic random access memory (DRAM) constructions.Type: GrantFiled: August 24, 2004Date of Patent: October 17, 2006Assignee: Micron Technology, Inc.Inventors: Randal W. Chance, Gordon A. Haller, Sanh D. Tang, Steven D. Cummings
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Patent number: 6838714Abstract: A photodiode for use in an imager having an improved charge leakage. The photodiode has a doped region that is spaced away from the field isolation to minimize charge leakage. A second embodiment of invention provides a second implant to improve charge leakage to the substrate. The photodiodes according to the invention provide improve charge leakage, improved reactions to dark current and an improved signal to noise ratio. Also disclosed are processes for forming the photodiode.Type: GrantFiled: February 12, 2001Date of Patent: January 4, 2005Assignee: Micron Technology, Inc.Inventors: Howard E. Rhodes, Werner Juengling, Thomas A. Figura, Steven D. Cummings
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Publication number: 20040229455Abstract: A four layer interconnect structure is disclosed which includes a bottom conductive reactive layer such as titanium, a conductive barrier layer, such as titanium nitride, a conductive layer, such as aluminum-copper alloy, and a top conductive barrier layer, such as titanium nitride. The interconnection structure can be fabricated using conventional sputter deposition technology. The resulting interconnection structure provides a highly conductive thin film structure that provides good contact to tungsten plugs with small contact dimensions, good patternability on fine lines, and good reliability.Type: ApplicationFiled: June 18, 2004Publication date: November 18, 2004Inventors: Howard E. Rhodes, Steven D. Cummings
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Publication number: 20040222525Abstract: A four layer interconnect structure is disclosed which includes a bottom conductive reactive layer such as titanium, a conductive barrier layer, such as titanium nitride, a conductive layer, such as aluminum-copper alloy, and a top conductive barrier layer, such as titanium nitride. The interconnection structure can be fabricated using conventional sputter deposition technology. The resulting interconnection structure provides a highly conductive thin film structure that provides good contact to tungsten plugs with small contact dimensions, good patternability on fine lines, and good reliability.Type: ApplicationFiled: June 18, 2004Publication date: November 11, 2004Inventors: Howard E. Rhodes, Steven D. Cummings
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Publication number: 20040217409Abstract: An enhanced-surface-area conductive layer compatible with high-dielectric constant materials is created by forming a film or layer having at least two phases, at least one of which is electrically conductive. The film may be formed in any convenient manner, such as by chemical vapor deposition techniques, which may be followed by an anneal to better define and/or crystallize the at least two phases. The film may be formed over an underlying conductive layer. At least one of the at least two phases is selectively removed from the film, such as by an etch process that preferentially etches at least one of the at least two phases so as to leave at least a portion of the electrically conductive phase. Ruthenium and ruthenium oxide, both conductive, may be used for the two or more phases. Iridium and its oxide, rhodium and its oxide, and platinum and platinum-rhodium may also be used. A wet etchant comprising ceric ammonium nitrate and acetic acid may be used.Type: ApplicationFiled: June 2, 2004Publication date: November 4, 2004Applicant: Micron Technology, Inc.Inventors: Cem Basceri, Mark Visokay, Thomas M. Graettinger, Steven D. Cummings
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Patent number: 6812112Abstract: An enhanced-surface-area conductive layer compatible with high-dielectric constant materials is created by forming a film or layer having at least two phases, at least one of which is electrically conductive. The film may be formed in any convenient manner, such as by chemical vapor deposition techniques, which may be followed by an anneal to better define and/or crystallize the at least two phases. The film may be formed over an underlying conductive layer. At least one of the at least two phases is selectively removed from the film, such as by an etch process that preferentially etches at least one of the at least two phases so as to leave at least a portion of the electrically conductive phase. Ruthenium and ruthenium oxide, both conductive, may be used for the two or more phases. Iridium and its oxide, rhodium and its oxide, and platinum and platinum-rhodium may also be used. A wet etchant comprising ceric ammonium nitrate and acetic acid may be used.Type: GrantFiled: September 26, 2001Date of Patent: November 2, 2004Assignee: Micron Technology, Inc.Inventors: Cem Basceri, Mark Visokay, Thomas M. Graettinger, Steven D. Cummings
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Patent number: 6764943Abstract: An enhanced-surface-area conductive layer compatible with high-dielectric constant materials is created by forming a film or layer having at least two phases, at least one of which is electrically conductive. The film may be formed in any convenient manner, such as by chemical vapor deposition techniques, which may be followed by an anneal to better define and/or crystallize the at least two phases. The film may be formed over an underlying conductive layer. At least one of the at least two phases is selectively removed from the film, such as by an etch process that preferentially etches at least one of the at least two phases so as to leave at least a portion of the electrically conductive phase. Ruthenium and ruthenium oxide, both conductive, may be used for the two or more phases. Iridium and its oxide, rhodium and its oxide, and platinum and platinum-rhodium may also be used. A wet etchant comprising ceric ammonium nitrate and acetic acid may be used.Type: GrantFiled: July 15, 2002Date of Patent: July 20, 2004Assignee: Micron Technology, Inc.Inventors: Cem Basceri, Mark Visokay, Thomas M. Graettinger, Steven D. Cummings
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Publication number: 20030199141Abstract: An enhanced-surface-area conductive layer compatible with high-dielectric constant materials is created by forming a film or layer having at least two phases, at least one of which is electrically conductive. The film may be formed in any convenient manner, such as by chemical vapor deposition techniques, which may be followed by an anneal to better define and/or crystallize the at least two phases. The film may be formed over an underlying conductive layer. At least one of the at least two phases is selectively removed from the film, such as by an etch process that preferentially etches at least one of the at least two phases so as to leave at least a portion of the electrically conductive phase. Ruthenium and ruthenium oxide, both conductive, may be used for the two or more phases. Iridium and its oxide, rhodium and its oxide, and platinum and platinum-rhodium may also be used. A wet etchant comprising ceric ammonium nitrate and acetic acid may be used.Type: ApplicationFiled: July 15, 2002Publication date: October 23, 2003Applicant: Micron Technology, Inc.Inventors: Cem Basceri, Mark Visokay, Thomas M. Graettinger, Steven D. Cummings
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Patent number: 6534335Abstract: A photodiode for use in an imager having an improved charge leakage. The photodiode has a doped region that is spaced away from the field isolation to minimize charge leakage. A second embodiment of invention provides a second implant to improve charge leakage to the substrate. The photodiodes according to the invention provide improve charge leakage, improved reactions to dark current and an improved signal to noise ratio. Also disclosed are processes for forming the photodiode.Type: GrantFiled: July 22, 1999Date of Patent: March 18, 2003Assignee: Micron Technology, Inc.Inventors: Howard E. Rhodes, Werner Juengling, Thomas A. Figura, Steven D. Cummings
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Patent number: 6482736Abstract: An enhanced-surface-area conductive layer compatible with high-dielectric constant materials is created by forming a film or layer having at least two phases, at least one of which is electrically conductive. The film may be formed in any convenient manner, such as by chemical vapor deposition techniques, which may be followed by an anneal to better define and/or crystallize the at least two phases. The film may be formed over an underlying conductive layer. At least one of the at least two phases is selectively removed from the film, such as by an etch process that preferentially etches at least one of the at least two phases so as to leave at least a portion of the electrically conductive phase. Ruthenium and ruthenium oxide, both conductive, may be used for the two or more phases. Iridium and its oxide, rhodium and its oxide, and platinum and platinum-rhodium may also be used. A wet etchant comprising ceric ammonium nitrate and acetic acid may be used.Type: GrantFiled: June 8, 2000Date of Patent: November 19, 2002Assignee: Micron Technology, Inc.Inventors: Cem Basceri, Mark Visokay, Thomas M. Graettinger, Steven D. Cummings
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Publication number: 20020019088Abstract: An enhanced-surface-area conductive layer compatible with high-dielectric constant materials is created by forming a film or layer having at least two phases, at least one of which is electrically conductive. The film may be formed in any convenient manner, such as by chemical vapor deposition techniques, which may be followed by an anneal to better define and/or crystallize the at least two phases. The film may be formed over an underlying conductive layer. At least one of the at least two phases is selectively removed from the film, such as by an etch process that preferentially etches at least one of the at least two phases so as to leave at least a portion of the electrically conductive phase. Ruthenium and ruthenium oxide, both conductive, may be used for the two or more phases. Iridium and its oxide, rhodium and its oxide, and platinum and platinum-rhodium may also be used. A wet etchant comprising ceric ammonium nitrate and acetic acid may be used.Type: ApplicationFiled: September 26, 2001Publication date: February 14, 2002Inventors: Cem Basceri, Mark Visokay, Thomas M. Graettinger, Steven D. Cummings
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Publication number: 20010017382Abstract: A photodiode for use in an imager having an improved charge leakage. The photodiode has a doped region that is spaced away from the field isolation to minimize charge leakage. A second embodiment of invention provides a second implant to improve charge leakage to the substrate. The photodiodes according to the invention provide improve charge leakage, improved reactions to dark current and an improved signal to noise ratio. Also disclosed are processes for forming the photodiode.Type: ApplicationFiled: February 12, 2001Publication date: August 30, 2001Inventors: Howard E. Rhodes, Werner Juengling, Thomas A. Figura, Steven D. Cummings
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Patent number: 5371701Abstract: A stacked delta cell (SDC) capacitor using a modified stacked capacitor storage cell fabrication process. The SDC is made up of polysilicon structure, having an inverted deltoid cross section, located at a buried contact and extending to an adjacent storage node overlaid by polysilicon with a dielectric sandwiched in between. The addition of the polysilicon structure increases storage capability 120% without enlarging the surface area defined for a normal stacked capacitor cell.Type: GrantFiled: April 5, 1994Date of Patent: December 6, 1994Assignee: Micron Technology, Inc.Inventors: Ruojia Lee, Charles H. Dennison, Yauh-Ching Liu, Pierre Fazan, Steven D. Cummings
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Patent number: 5321649Abstract: A stacked delta cell (SDC) capacitor using a modified stacked capacitor storage cell fabrication process. The SDC is made up of polysilicon structure, having an inverted deltoid cross section, located at a buried contact and extending to an adjacent storage node overlaid by polysilicon with a dielectric sandwiched in between. The addition of the polysilicon structure increases storage capability 120% without enlarging the surface area defined for a normal stacked capacitor cell.Type: GrantFiled: June 11, 1993Date of Patent: June 14, 1994Assignee: Micron Technology, Inc.Inventors: Ruojia Lee, Charles H. Dennison, Yauh-Ching Liu, Pierre Fazan, Steven D. Cummings