Patents by Inventor Steven D. McJunkin

Steven D. McJunkin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Implementing system irritator accelerator FPGA unit (AFU) residing behind a coherent attached processors interface (CAPI) unit
    Patent number: 9607120
    Abstract: A method and apparatus are provided for implementing system irritator accelerator field programmable gate array (FPGA) Units (AFUs) residing behind a Coherent Attached Processors Interface (CAPI) unit in a computer system. An AFU is implemented in an FPGA residing behind the CAPI unit, the AFU includes a system irritator accelerator. A processor configures the AFU and enables the AFU system irritator to execute. The AFU system irritator is replicated to create additional irritation and is re-programmable.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: March 28, 2017
    Assignee: International Business Machines Corporation
    Inventors: Jason D. Greenwood, Steven D. McJunkin, Paul E. Schardt, Nathaniel K. Tuen
  • Implementing system irritator accelerator FPGA unit (AFU) residing behind a coherent attached processors interface (CAPI) unit
    Patent number: 9600618
    Abstract: A method and apparatus are provided for implementing system irritator accelerator field programmable gate array (FPGA) Units (AFUs) residing behind a Coherent Attached Processors Interface (CAPI) unit in a computer system. An AFU is implemented in an FPGA residing behind the CAPI unit, the AFU includes a system irritator accelerator. A processor configures the AFU and enables the AFU system irritator to execute. The AFU system irritator is replicated to create additional irritation and is re-programmable.
    Type: Grant
    Filed: April 27, 2015
    Date of Patent: March 21, 2017
    Assignee: International Business Machines Corporation
    Inventors: Jason D. Greenwood, Steven D. McJunkin, Paul E. Schardt, Nathaniel K. Tuen
  • IMPLEMENTING SYSTEM IRRITATOR ACCELERATOR FPGA UNIT (AFU) RESIDING BEHIND A COHERENT ATTACHED PROCESSORS INTERFACE (CAPI) UNIT
    Publication number: 20160188778
    Abstract: A method and apparatus are provided for implementing system irritator accelerator field programmable gate array (FPGA) Units (AFUs) residing behind a Coherent Attached Processors Interface (CAPI) unit in a computer system. An AFU is implemented in an FPGA residing behind the CAPI unit, the AFU includes a system irritator accelerator. A processor configures the AFU and enables the AFU system irritator to execute. The AFU system irritator is replicated to create additional irritation and is re-programmable.
    Type: Application
    Filed: December 30, 2014
    Publication date: June 30, 2016
    Inventors: Jason D. Greenwood, Steven D. McJunkin, Paul E. Schardt, Nathaniel K. Tuen
  • IMPLEMENTING SYSTEM IRRITATOR ACCELERATOR FPGA UNIT (AFU) RESIDING BEHIND A COHERENT ATTACHED PROCESSORS INTERFACE (CAPI) UNIT
    Publication number: 20160188780
    Abstract: A method and apparatus are provided for implementing system irritator accelerator field programmable gate array (FPGA) Units (AFUs) residing behind a Coherent Attached Processors Interface (CAPI) unit in a computer system. An AFU is implemented in an FPGA residing behind the CAPI unit, the AFU includes a system irritator accelerator. A processor configures the AFU and enables the AFU system irritator to execute. The AFU system irritator is replicated to create additional irritation and is re-programmable.
    Type: Application
    Filed: April 27, 2015
    Publication date: June 30, 2016
    Inventors: Jason D. Greenwood, Steven D. McJunkin, Paul E. Schardt, Nathaniel K. Tuen