Abstract: Authentication of an entity remotely managing a data processing system is enabled to allow changes by the remote entity to hard-locked critical security information normally accessible only during the POST and only to trusted entities such as the system BIOS. The remote entity builds a change request and generates a hash from the change request with a current password appended. The change request and the hash are stored in a lockable non-volatile buffer which, once locked, requires a system reset to access. During the next POST, a trusted entity such as the system BIOS reads the change request, generates an authentication hash from the change request and the current password within the hard-locked security information, and compares the buffered hash with the generated hash. If a match is determined, the security information is updated; otherwise a tamper error is reported.

Abstract: A method and system for preventing an unauthorized reset of a subsystem in a processing system is disclosed. A first embodiment of a method and system in accordance with the present invention includes receiving notification that the processing system is entering a powered off sleep state, setting a first signal to block a subsystem reset, and locking the first signal to protect the subsystem from intrusion while in and recovering from the powered off sleep state. In another embodiment, a system and method in accordance with the present invention prevents a subsystem reset following a powered off sleep state by including the steps of setting a block signal when the powered off sleep state is being entered, setting a lock signal to lock the block signal, asserting a system reset which releases the lock signal when the system begins recovering from the powered off sleep state, and clearing the block signal so that a device driver regains control of the subsystem reset.

Abstract: Within a multiprocessor data processing system, a request for a system management interrupt by a requesting processor causes the state of at least the requesting processor to be saved in memory. Each processor's saved state includes contents of at least one internal software-writable register, where the software-writable register of the requesting processor contains an identifying signature. A system management interrupt handler is then executed. Execution of the system management interrupt handler entails determining, from the contents of at least one internal software-writable register saved within memory, the identity of the requesting processor. The system management interrupt handler then handles the system management interrupt in accordance with the determination of the requesting processor. The handling of the system management interrupt may entail reading data from or writing data into the saved state of the requesting processor.