Patents by Inventor Steven E. Bergen

Steven E. Bergen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Data processor architecture and instruction format for increased efficiency
    Patent number: 6510444
    Abstract: A processor (12) uses an architecture having a plurality of redundant state machines (86, 90) and a new instruction format (30) to increase efficiency of the utilization of operational circuitry, such as a multiply accumulate unit MAC (52). Thus the processor (12) can switch contexts or channels without incurring any dead or wasted cycles for the MAC unit (52).
    Type: Grant
    Filed: June 16, 1999
    Date of Patent: January 21, 2003
    Assignee: Motorola, Inc.
    Inventors: Francois Mackre, Steven E. Bergen
  • DATA PROCESSOR ARCHITECTURE AND INSTRUCTION FORMAT FOR INCREASED EFFICIENCY
    Publication number: 20020169811
    Abstract: A processor (12) uses an architecture having a plurality of redundant state machines (86, 90) and a new instruction format (30) to increase efficiency of the utilization of operational circuitry, such as a multiply accumulate unit MAC (52). Thus the processor (12) can switch contexts or channels without incurring any dead or wasted cycles for the MAC unit (52).
    Type: Application
    Filed: June 16, 1999
    Publication date: November 14, 2002
    Inventors: FRANCOIS MACKRE, STEVEN E. BERGEN