Patents by Inventor Steven E. Reder
Steven E. Reder has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8653357Abstract: A device and method wherein a thermo electric generator device is disposed between stacks of a multiple level device, or is provided on or under a die of a package and is conductively connected to the package. The thermo electric generator device is configured to generate a voltage by converting heat into electric power. The voltage which is generated by the thermo electric generator can be recycled back into the die itself, or to a higher-level unit in the system, even to a cooling fan.Type: GrantFiled: February 25, 2013Date of Patent: February 18, 2014Assignee: LSI CorporationInventors: Zachary A. Prather, Steven E. Reder, Michael J. Berman
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Patent number: 8404960Abstract: A device and method wherein a thermo electric generator device is disposed between stacks of a multiple level device, or is provided on or under a die of a package and is conductively connected to the package. The thermo electric generator device is configured to generate a voltage by converting heat into electric power. The voltage which is generated by the thermo electric generator can be recycled back into the die itself, or to a higher-level unit in the system, even to a cooling fan.Type: GrantFiled: August 31, 2004Date of Patent: March 26, 2013Assignee: LSI CorporationInventors: Zachary A. Prather, Steven E. Reder, Michael J. Berman
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Patent number: 7332062Abstract: An electroplating tool for providing a metal or metal film on a semiconductor wafer during processing thereof has a wafer chucking mechanism with a conductor or conductors associated therewith. The conductor(s) are electrically connected to a controller that applies a voltage or current applied thereto for altering the position of and/or varying the intensity of electromagnetic field lines originating from a source anode of the electroplating tool. The electromagnetic field lines originating from the source anode direct the deposition of metal from the electroplating solution to the semiconductor wafer. The conductor(s) of the wafer chucking mechanism improve and/or modulate the electromagnetic field lines of the electroplating process. This provides greater control of metal deposition during the electroplating process such that uniformity of the metal (e.g. copper) is provided across the semiconductor wafer.Type: GrantFiled: June 2, 2003Date of Patent: February 19, 2008Assignee: LSI Logic CorporationInventors: Steven E. Reder, Michael J. Berman
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Patent number: 7314527Abstract: A gas delivery system for delivering a gas to a reactor. The reactor has a reactor chamber, a gas inlet port, and a gas exhaust port. The gas delivery system included a torch chamber having an outer wall extending along a first axis. A torch injector extends into the torch chamber at a first end of the torch chamber. The torch injector includes at least one gas intake port for receiving at least one gas and a gas injector section for expelling the at least one gas into the torch chamber. A gas outlet section is disposed at a second end of the torch chamber. The gas outlet section includes a first tubing member disposed along a second axis and a gas outlet port connected to the first tubing member. The gas outlet port of the gas outlet section engages the gas inlet port of the reactor. The torch chamber, the torch injector, and the gas outlet section of the gas delivery system are formed into a unitized structure with no resealable connections between them.Type: GrantFiled: December 10, 2001Date of Patent: January 1, 2008Assignee: LSI Logic CorporationInventors: Steven E. Reder, Preston E. Pillow
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Patent number: 7183787Abstract: A device for measuring resistances associated with electrical contacts of a contact ring used in a semiconductor wafer electroplating process. The device includes a substrate and a conductive pattern on the substrate. The conductive pattern is electrically contactable with the electrical contacts of the contact ring. Resistance measurement circuitry is connected to the conductive pattern. The resistance measurement circuitry is configured to send test signals to the conductive pattern, receive signals from the conductive pattern, and measure the resistances associated with the electrical contacts of the contact ring. A method of using such a device to measure resistances associated with electrical contacts of a contact ring used in a semiconductor wafer electroplating process is also provided.Type: GrantFiled: November 26, 2003Date of Patent: February 27, 2007Assignee: LSI Logic CorporationInventors: Michael J. Berman, Steven E. Reder
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Method to improve the control of electro-polishing by use of a plating electrode an electrolyte bath
Patent number: 7067048Abstract: A method and apparatus which uses a plating electrode in an electrolyte bath. The plating electrode works to purify an electrolyte polishing solution during the electro-polishing process. Preferably, the plating electrode is employed in a closed loop feedback system. The plating electrode may be powered by a power supply which is controlled by a controller. A sensor may be connected to the controller and the sensor may be configured to sense a characteristic (for example, but not limited to: resistance, conductance or optical transmission, absorption of light, etc.) of the electrolyte bath, which tends to indicate the level of saturation. Preferably, the plating electrode is easily replaceable.Type: GrantFiled: August 8, 2003Date of Patent: June 27, 2006Assignee: LSI Logic CorporationInventors: Michael J. Berman, Steven E. Reder -
Patent number: 6982206Abstract: According to one embodiment, a method of forming a low-k dielectric composite film is provided. A low-k interconnect dielectric layer is strengthened by forming whiskers in the low-k film. The whiskers are formed simultaneously with the low-k layer. In one embodiment, the low-k structure is removed by heating a volatile matrix film, leaving a whisker residue.Type: GrantFiled: October 2, 2003Date of Patent: January 3, 2006Assignee: LSI Logic CorporationInventors: Michael J. Berman, Steven E. Reder, Hemanshu Bhatt
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Patent number: 6971944Abstract: A method and control system for detecting harmonic oscillation in a chemical mechanical polishing process and reacting thereto, such as by taking steps to at least one of: 1) reduce or eliminate the harmonic oscillation; and 2) counter the noise which is associated with the harmonic oscillation. By reducing or eliminating harmonic oscillation, films with reduced structure strengths including low k dielectric films can be used. By countering the noise, the quality of the work environment is improved.Type: GrantFiled: February 17, 2004Date of Patent: December 6, 2005Assignee: LSI Logic CorporationInventors: Michael J. Berman, Steven E. Reder, Bruce Whitefield
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Patent number: 6927177Abstract: A system for thinning a layer on a substrate without damaging a delicate underlying layer in the substrate. The system includes means for mechanically eroding the layer on the substrate, and means for electropolishing the layer on the substrate. In this manner, portions of the layer that cannot be removed by electropolishing can be removed by the mechanical erosion. However, electropolishing can preferentially be used on some portions of the layer so that unnecessary mechanical stresses can be avoided. Thus, the system imparts less mechanical stress to the substrate during the removal of the layer, and the delicate underlying layer receives less damage during the process, and preferably no damage whatsoever.Type: GrantFiled: October 24, 2003Date of Patent: August 9, 2005Assignee: LSI Logic CorporationInventors: Steven E. Reder, Michael J. Berman
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Patent number: 6837967Abstract: A plasma edge cleaning apparatus is configured to remove film deposits from a wafer edge. A gas distribution manifold is annular shaped and positioned to provide plasma process gases near the edge of the wafer. A top insulator and a wafer support each include a magnetic coil to generate a magnetic field for shielding the selected portions of a wafer from the generated plasma. The top insulator is positioned above the wafer during edge processing so as to form a small gap between the top insulator and the wafer to prevent plasma from etching active die areas of the wafer.Type: GrantFiled: November 6, 2002Date of Patent: January 4, 2005Assignee: LSI Logic CorporationInventors: Michael J. Berman, Steven E. Reder, Rennie G. Barber
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Patent number: 6743701Abstract: A method for forming an active area in a substrate includes the steps of growing an isolation oxide on a silicon substrate, providing a photresist mask to define the active areas on the substrate, performing etching and stripping processes, removing the residual oxide from the active areas and selectively growing an epitaxial silicon layer.Type: GrantFiled: December 20, 2002Date of Patent: June 1, 2004Assignee: LSI Logic CorporationInventors: Michael J. Berman, Steven E. Reder, Derryl Allman
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Patent number: 6739953Abstract: According to one embodiment, a method of planarizing of a surface of a semiconductor substrate is provided. A copper layer is inlaid in a dielectric layer of the substrate. The semiconductor substrate is disposed opposite to a polishing pad and relative movement provided between the pad and the substrate. An electrolytic slurry containing abrasive particles is flowed over the substrate or the pad. A voltage is applied between the polishing pad and the substrate to perform electropolishing of the substrate. The rate of chemical mechanical polishing is controlled by the down force applied to a polishing head urging the substrate against the polishing pad.Type: GrantFiled: April 9, 2003Date of Patent: May 25, 2004Assignee: LSI Logic CorporationInventors: Michael J. Berman, Steven E. Reder
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Publication number: 20040086430Abstract: An apparatus for reducing residual oxygen content from a processing chamber of an atmospheric reactor after the processing chamber of the atmospheric reactor has been exposed to an oxygen environment. The processing chamber of the atmospheric reactor has an inert gas purge, including an inert gas source, for reducing a residual oxygen level within the processing chamber of the atmospheric reactor at a rate of reduction. A venturi vacuum system is enabled by the inert gas source. The venturi vacuum system draws a vacuum on the processing chamber of the atmospheric reactor and supplements the inert gas purge, thereby accelerating the rate at which the residual oxygen level is reduced within the processing chamber of the atmospheric reactor. In this manner, the vacuum created by the venturi vacuum system increases the efficiency of the inert gas purge by reducing by some moderate degree the pressure within the processing chamber of the atmospheric reactor.Type: ApplicationFiled: August 13, 2003Publication date: May 6, 2004Applicant: LSI Logic CorporationInventors: Mark I. Mayeda, Steven E. Reder, Richard Gimmi, Matthew R. Trattles
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Patent number: 6649537Abstract: The present invention provides a method of forming a dielectric on a semiconductor substrate. A dielectric is grown at a substrate interface in a plurality of increments. Stress is relieved at the dielectric substrate interface between each increment. In another aspect, stress relief is performed by annealing the substrate. The annealing is performed by placing the substrate in an inert environment and by raising the temperature surrounding the substrate.Type: GrantFiled: November 19, 2001Date of Patent: November 18, 2003Assignee: LSI Logic CorporationInventors: Steven E. Reder, Hemanshu D. Bhatt
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Publication number: 20030211811Abstract: A substrate carrier having a deformable surface for receiving a substrate. Non annular pressure application zones apply pressure to the deformable surface, and addressable transducers within the pressure application zones receive a signal and applying a selectable amount of pressure in response to the signal. In this manner, the amount of pressure provided by the substrate carrier differs from one portion of the substrate to another in a selectable manner. Thus, the pressure applied to the substrate can be tailored to the non uniform thickness of the layer that is being thinned. In other words, portions of the substrate where the layer is thicker can be pressed upon with a greater force by the substrate carrier, thus urging the substrate more forcefully into the polishing pad in those portions, and thereby removing material from the layer at a greater rate of speed in those portions.Type: ApplicationFiled: May 10, 2002Publication date: November 13, 2003Inventors: Michael J. Berman, Steven E. Reder
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Patent number: 6635116Abstract: An apparatus for reducing residual oxygen content from a processing chamber of an atmospheric reactor after the processing chamber of the atmospheric reactor has been exposed to an oxygen environment. The processing chamber of the atmospheric reactor has an inert gas purge, including an inert gas source, for reducing a residual oxygen level within the processing chamber of the atmospheric reactor at a rate of reduction. A venturi vacuum system is enabled by the inert gas source. The venturi vacuum system draws a vacuum on the processing chamber of the atmospheric reactor and supplements the inert gas purge, thereby accelerating the rate at which the residual oxygen level is reduced within the processing chamber of the atmospheric reactor. In this manner, the vacuum created by the venturi vacuum system increases the efficiency of the inert gas purge by reducing by some moderate degree the pressure within the processing chamber of the atmospheric reactor.Type: GrantFiled: August 29, 2000Date of Patent: October 21, 2003Assignee: LSI Logic CorporationInventors: Mark I. Mayeda, Steven E. Reder, Richard Gimmi, Matthew R. Trattles
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Patent number: 6574525Abstract: A reaction chamber of the type used to create a reaction at a surface of a substrate disposed within the reaction chamber. A transmitter produces a transmitted beam having first characteristics, where the transmitter is disposed outside of the reaction chamber. A view port is disposed in a boundary wall of the reaction chamber, where the view port is formed of a material that is transparent at least in part to the transmitted beam. The transmitter, the view port, and the substrate are aligned such that the transmitted beam is directable to and reflected at least in part from the surface of the substrate, thereby producing a reflected beam having second characteristics. A receiver is disposed outside of the reaction chamber, and the receiver receives the reflected beam from the surface of the substrate through the view port. The receiver also senses the second characteristics of the reflected beam and reports the second characteristics.Type: GrantFiled: March 25, 2002Date of Patent: June 3, 2003Assignee: LSI Logic CorporationInventors: Steven E. Reder, Hemanshu D. Bhatt
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Patent number: 6355577Abstract: The invention provides a method for depositing a film on a surface of a semiconductor wafer while preventing formation of defects on the surface of the wafer. The method includes selecting a quartz wafer carrier for holding the semiconductor wafer during the depositing of the film, where the wafer carrier has quartz rods with fire-polished slots for receiving an edge of the semiconductor wafer. The semiconductor wafer is placed into the quartz wafer carrier with the edge of the wafer disposed within the fire-polished slots, and the wafer carrier and wafer are loaded into a deposition chamber. Air is evacuated from the deposition chamber, the temperature in the chamber is raised to a deposition temperature, the pressure within the deposition chamber is adjusted to a deposition pressure, and process gases are introduced to the deposition chamber. By reaction of the process gases, the film is deposited on the surface of the wafer and on the wafer carrier.Type: GrantFiled: May 30, 2000Date of Patent: March 12, 2002Assignee: LSI Logice CorporationInventors: Steven E. Reder, Ynhi T. Le
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Patent number: 6328347Abstract: A system for coupling a ball fitting connected to a first tubing to a socket fitting connected to a second tubing. A first coupling forms an aperture having a diameter that is larger than the diameter of the ball fitting, and receives the ball fitting. The first coupling forms an annular race, with an annular surface disposed between the annular race and the aperture. First split ring pieces are assembled into a first ring that forms an aperture having a diameter that is smaller than the diameter of the ball fitting, and receives the first tubing. The first ring forms an annular ridge that engages the annular race, and aligns the first split ring pieces. The annular surface applies uniform axial pressure to a first surface of the first ring. The first ring has a second surface opposing the first surface that applies uniform axial pressure to a back portion of the ball fitting.Type: GrantFiled: September 22, 1999Date of Patent: December 11, 2001Assignee: LSI Logic CorporationInventors: Steven E. Reder, Preston E. Pillow, William L. Emery
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Patent number: 5146869Abstract: A gas injector apparatus and process, having a gas injector tube ending at the top of a vertical reaction chamber, improves the thickness and resistivity uniformity of films deposited in CVD process reactors. The injection tube has a plurality of baffles to increase the residence time of reactant gases flowing toward the reaction chamber.Type: GrantFiled: June 11, 1990Date of Patent: September 15, 1992Assignee: National Semiconductor CorporationInventors: Kenneth W. Bohannon, Kuppuswamy Srikrishna, Anthony F. Sholing, Steven E. Reder