Abstract: An electronic device assembly that includes a die and a substrate, and optionally a lead frame and a heat spreader. The die is characterized as an electronic device in die form, and has a polished die region. The substrate has a polished substrate region in direct contact with the polished die region. The polished die region and the polished substrate region have surface finishes effective to attach the die to the substrate by way of an atomic bond. The lead-frame has a polished lead-frame region, and the heat spreader has a polished heat spreader region. These polished regions may also be attached to the polished die region or the polished substrate region by way of an atomic bond.

Abstract: An electronic device assembly that includes a die and a substrate, and optionally a lead frame and a heat spreader. The die is characterized as an electronic device in die form, and has a polished die region. The substrate has a polished substrate region in direct contact with the polished die region. The polished die region and the polished substrate region have surface finishes effective to attach the die to the substrate by way of an atomic bond. The lead-frame has a polished lead-frame region, and the heat spreader has a polished heat spreader region. These polished regions may also be attached to the polished die region or the polished substrate region by way of an atomic bond.

Abstract: A method for fabricating microchip devices is provided. The method includes the steps of providing a first planar substrate, locating at least one first alignment feature in the surface of the first planar substrate, and bonding a second substrate to the surface of the first planar substrate. The method further includes the step of aligning subsequent process operations performed on at least one of the first and second substrates to visible alignment features of the first substrate, wherein the visible alignment features are at least one of the first alignment feature and a visible feature that corresponds to the location of the first alignment feature.

Abstract: A process for preconditioning assembled parts for leak testing is disclosed. The process includes placing the assembled parts under vacuum to draw out through any unsealed interface of the assembled parts any fluid trapped therein, and while under vacuum, exposing the assembled parts to a liquid conditioning medium (LCM), wherein the LCM may comprise a mixture of water and a low vapor pressure surfactant. The assembled parts exposed to the LCM are then placed under positive pressure greater than ambient pressure to drive the LCM into any unsealed interfaces of the assembled parts. Any residual LCM on the external surfaces of the assembled parts is then removed, and the assembled parts are subsequently tested for LCM ingress.

Abstract: This invention includes a method of making a bridge-supported accelerometer structure. A first wafer is worked, preferably by bulk micromachining, to provide a proof mass supported by a thin membrane on all sides. The thin membrane has the same thickness as the bridges to be defined therein. The first wafer is bonded to a second wafer having a cavity formed therein. The first wafer is then worked, preferably by plasma etching, to delineate bridges in the thin membrane. The cavity in the second wafer provides damping of the proof mass which reduced bridge breakage as portions of the thin membrane are removed leaving the final bridge-supported accelerometer structure. Combining the two wafers together prior to delineating the bridge provides for handling and processing of a much less fragile structure than the first wafer alone with bridges delineated therein.

Abstract: A process for silicon wafer-to-wafer bonding at temperatures lower than 500.degree. C. has been developed. It consists of (1) treating the cleaned surfaces to make them smooth and hydrophilic, (2) initiating the bond by making intimate contact between wafers and (3) enhancing the bond strength at elevated temperatures. This bonding process can be applied to sensor packaging.

Abstract: This invention generally relates to the provision of a vent path during the bonding of silicon wafers and the subsequent encapsulation of the individual devices. A double-sided polished silicon wafer is used for the device wafer. The device wafer includes circuitry, thin membranes and metal interconnections. When bonding a bottom wafer to the device wafer, a vented path exists between the wafers. The venting path includes serpentine shape channel formed by interdigitated fingers and cavities. The cavity and the interdigitated patterns can be etched either together or separately into either wafer. A top wafer has a cavity formed therein. When the top device and bottom wafers are bonded together, the venting path is sealed by dipping the device in a sealing liquid. The serpentine path prevents the sealing liquid from reaching the cavity.

Abstract: A microaccelerometer is provided which has a silicon substrate bonded to a silicon capping plate and silicon back plate, wherein the bonds between the three silicon wafers are characterized by a relatively low residual stress level over a wide temperature range. The bonds are formed by means of an appropriate adhesive at a relatively low temperature without degradation to the microaccelerometer. The bonds between the silicon wafers also provide stress relief during use and packaging of the microaccelerometer. With this invention, the damping distance for the proof mass of the microaccelerometer is accurately controllable and stop means are provided for preventing excessive deflection of the proof mass in a direction perpendicular to the plane of the microaccelerometer.

Abstract: A microaccelerometer is provided which has a silicon substrate bonded to a silicon capping plate and silicon back plate, wherein the bonds between the three silicon wafers are characterized by a relatively low residual stress level over a wide temperature range. The bonds are formed by means of an appropriate adhesive at a relatively low temperature without degradation to the microaccelerometer. The bonds between the silicon wafers also provide stress relief during use and packaging of the microaccelerometer. With this invention, the damping distance for the proof mass of the microaccelerometer is accurately controllable and stop means are provided for preventing excessive deflection of the proof mass in a direction perpendicular to the plane of the microaccelerometer.

Abstract: A method is disclosed for forming thin, suspended membranes of epitaxial silicon material. Silicon oxide strips having a predetermined thickness are first formed on a silicon substrate. The gap, or spacing, between adjaceant beams is preferably less than or equal to about 1.4 times the thickness of the silicon oxide strip. The underlying silicon substrate is exposed within these gaps in the silicon oxide layer, thereby the gaps provide a seed hole for subsequent epitaxial growth from the silicon substrate. Epitaxial silicon is grown through the seed holes and then allowed to grow laterally over the silicon oxide strips to form a continuous layer of epitaxial silicon over the silicon oxide strips. The backside of the silicon substrate, or surface opposite the surface having the silicon oxide strips, is then masked to delineate the desired diaphragm and microbridge pattern. The silicon is etched conventionally from the backside.