Patents by Inventor Steven Eskildsen

Steven Eskildsen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Supply voltage or ground connections for integrated circuit device
    Patent number: 8536716
    Abstract: Embodiments disclosed herein may relate to supply voltage or ground connections for integrated circuit devices. As one example, two or more supply voltage bond fingers may be connected together via one or more electrically conductive interconnects.
    Type: Grant
    Filed: December 31, 2009
    Date of Patent: September 17, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Mostafa Naguib Abdulla, Steven Eskildsen
  • Supply voltage or ground connections including bond pad interconnects for integrated circuit device
    Patent number: 8531849
    Abstract: Embodiments disclosed herein may relate to supply voltage or ground connections for integrated circuit devices. As one example, two or more supply voltage bond pads on an integrated circuit die may be connected together via one or more electrically conductive interconnects.
    Type: Grant
    Filed: March 31, 2010
    Date of Patent: September 10, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Mostafa Naguib Abdulla, Steven Eskildsen
  • Signal shifting to allow independent control of identical stacked memory modules
    Patent number: 8198717
    Abstract: A memory device having die-stacking modules that are interchangeable within a Package-on-Package (PoP) and provide separate Chip Enable (CE) signals for all memory die in the die-stacking modules.
    Type: Grant
    Filed: May 8, 2009
    Date of Patent: June 12, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Robert Naylor Schenck, Steven Eskildsen
  • PACKAGE INCLUDING AN INTERPOSER HAVING AT LEAST ONE TOPOLOGICAL FEATURE
    Publication number: 20110127659
    Abstract: Embodiments include but are not limited to apparatuses and systems including semiconductor packages, e.g. memory packages, having an interposer including at least one topological feature, such as a depression in a surface of the interposer, a die coupled to the surface of the interposer, and an encapsulant material formed over the die and the interposer, and disposed in the at least one depression to resist movement of the encapsulant material relative to the interposer. Other embodiments may be described and claimed.
    Type: Application
    Filed: November 30, 2009
    Publication date: June 2, 2011
    Inventors: Steven Eskildsen, Aravind Ramamoorthy
  • Packaging method and apparatus
    Publication number: 20070004095
    Abstract: A method includes populating a circuit board with components, and encapsulating the circuit board and the components with a material. The method further includes separating the circuit board into a plurality of separate devices.
    Type: Application
    Filed: June 30, 2005
    Publication date: January 4, 2007
    Inventors: Richard Foehringer, Jason Snodgress, Steven Eskildsen, John Meyers
  • Spacerless die stacking
    Publication number: 20050067694
    Abstract: An embodiment of the present invention is a technique to stack dies in a die assembly. A plurality of dies are stacked on top of one another in a staggering configuration such that an upper die top surface in a pair of adjacent dies faces downward or upward and is displaced by a first distance with respect to a lower die in the pair. The adjacent dies are attached by an adhesive layer between the adjacent dies.
    Type: Application
    Filed: September 30, 2003
    Publication date: March 31, 2005
    Inventors: Florence Pon, Steven Eskildsen, Robert Kim