Abstract: Methods and systems for improving communication throughput of a link between SAS/SATA devices. The link, initially established at a first signal rate, is one of a SATA link and a SAS link. A SAS/SATA device increments one of the at least one counter based on an error sensed on the link. Based on the at least one counter, the SAS/SATA device determines whether to maintain the first signal rate. The link is re-established at a second signal rate based on the determination such that the second signal rate is lower than the first signal rate.

Abstract: Methods and structure described herein provide for detecting data inversions between electronic devices in communication with one another and automatically correcting those that inversions. An electronic device may be configured with a receiver that is configured for receiving differential serial data from a transmitter of another electronic device. The differential serial data is formatted according to a particular communication protocol associated with the electronic devices. The receiver detects an invalid sequence in the received differential serial data, such as an inverted SAS primitive, and automatically change the receive logic of the receiver such that subsequent received differential serial data is in the proper polarity. The transmitting device does not require notification of the change in receive logic.

Abstract: Apparatus, systems, and methods for testing SAS cables by applying a signal to one end of a SAS cable, receiving the signal from another end of the SAS cable, and generating an output of information relating to the testing. The testing apparatus may test one or more configuration characteristic of the SAS cable, including, for example a crossover status, a polarity status of transmit (“TX”) wires, and a polarity status of receive (“RX”) wires.

Abstract: Methods and systems for improving communication throughput of a link between SAS/SATA devices. The link, initially established at a first signal rate, is one of a SATA link and a SAS link. A SAS/SATA device increments one of the at least one counter based on an error sensed on the link. Based on the at least one counter, the SAS/SATA device determines whether to maintain the first signal rate. The link is re-established at a second signal rate based on the determination such that the second signal rate is lower than the first signal rate.

Abstract: Apparatus, systems, and methods for testing SAS cables by applying a signal to one end of a SAS cable, receiving the signal from another end of the SAS cable, and generating an output of information relating to the testing. The testing apparatus may test one or more configuration characteristic of the SAS cable, including, for example a crossover status, a polarity status of transmit (“TX”) wires, and a polarity status of receive (“RX”) wires.

Abstract: Methods and systems for customizing information in a memory associated with a SAS host bus adapter (“HBA”). A SAS HBA typically includes a memory component that stores information common to all SAS HBA's manufactured by a particular vendor (e.g., common instructions and data). In addition, each HBA memory component typically includes some information unique to each HBA (e.g., board trace number, SAS address, configuration page, boot record, etc.). Features and aspects hereof permit pre-programmed memory components to be integrated with a SAS HBA to eliminate a step to program an assembled HBA through a specialized, one-time interaction to add required unique information. Thus a manufacturer may simply integrate a pre-programmed memory component to an otherwise completed HBA assembly to complete the product manufacturing without need for a special programming step. Or a design or test engineer may simply replace a memory component to change unique information on the HBA.

Abstract: Methods and structure described herein provide for detecting data inversions between electronic devices in communication with one another and automatically correcting those that inversions. An electronic device may be configured with a receiver that is configured for receiving differential serial data from a transmitter of another electronic device. The differential serial data is formatted according to a particular communication protocol associated with the electronic devices. The receiver detects an invalid sequence in the received differential serial data, such as an inverted SAS primitive, and automatically change the receive logic of the receiver such that subsequent received differential serial data is in the proper polarity. The transmitting device does not require notification of the change in receive logic.

Abstract: Methods and systems for customizing information in a memory associated with a SAS host bus adapter (“HBA”). A SAS HBA typically includes a memory component that stores information common to all SAS HBA's manufactured by a particular vendor (e.g., common instructions and data). In addition, each HBA memory component typically includes some information unique to each HBA (e.g., board trace number, SAS address, configuration page, boot record, etc.). Features and aspects hereof permit pre-programmed memory components to be integrated with a SAS HBA to eliminate a step to program an assembled HBA through a specialized, one-time interaction to add required unique information. Thus a manufacturer may simply integrate a pre-programmed memory component to an otherwise completed HBA assembly to complete the product manufacturing without need for a special programming step. Or a design or test engineer may simply replace a memory component to change unique information on the HBA.

Abstract: Methods and systems for customizing information in a memory associated with a SAS host bus adapter (“HBA”). A SAS HBA typically includes a memory component that stores information common to all SAS HBA's manufactured by a particular vendor (e.g., common instructions and data). In addition, each HBA memory component typically includes some information unique to each HBA (e.g., board trace number, SAS address, configuration page, boot record, etc.). Features and aspects hereof permit pre-programmed memory components to be integrated with a SAS HBA to eliminate a step to program an assembled HBA through a specialized, one-time interaction to add required unique information. Thus a manufacturer may simply integrate a pre-programmed memory component to an otherwise completed HBA assembly to complete the product manufacturing without need for a special programming step. Or a design or test engineer may simply replace a memory component to change unique information on the HBA.

Abstract: Methods and systems for customizing information in a memory associated with a SAS host bus adapter (“HBA”). A SAS HBA typically includes a memory component that stores information common to all SAS HBA's manufactured by a particular vendor (e.g., common instructions and data). In addition, each HBA memory component typically includes some information unique to each HBA (e.g., board trace number, SAS address, configuration page, boot record, etc.). Features and aspects hereof permit pre-programmed memory components to be integrated with a SAS HBA to eliminate a step to program an assembled HBA through a specialized, one-time interaction to add required unique information. Thus a manufacturer may simply integrate a pre-programmed memory component to an otherwise completed HBA assembly to complete the product manufacturing without need for a special programming step. Or a design or test engineer may simply replace a memory component to change unique information on the HBA.