Patents by Inventor Steven G. Brantley
Steven G. Brantley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10560064Abstract: In examples, a system comprises a differential amplifier coupled to a parasitic capacitor positioned between a first node and a first reference voltage source. The system comprises a buffer amplifier having an input terminal and an output terminal, the input terminal coupled to the first node and the output terminal coupled to a cancellation capacitor. The system includes a controlled current source coupled to the first node and the input terminal, the controlled current source coupled to a second reference voltage source. The system comprises a current sense circuit coupled to the cancellation capacitor and the second reference voltage source.Type: GrantFiled: August 29, 2019Date of Patent: February 11, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Steven G. Brantley, Bharath Karthik Vasan, Srinivas K. Pulijala, Martijn Snoeij
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Publication number: 20190386622Abstract: In examples, a system comprises a differential amplifier coupled to a parasitic capacitor positioned between a first node and a first reference voltage source. The system comprises a buffer amplifier having an input terminal and an output terminal, the input terminal coupled to the first node and the output terminal coupled to a cancellation capacitor. The system includes a controlled current source coupled to the first node and the input terminal, the controlled current source coupled to a second reference voltage source. The system comprises a current sense circuit coupled to the cancellation capacitor and the second reference voltage source.Type: ApplicationFiled: August 29, 2019Publication date: December 19, 2019Inventors: Steven G. BRANTLEY, Bharath Karthik VASAN, Srinivas K. PULIJALA, Martijn SNOEIJ
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Patent number: 10511269Abstract: A voltage-to-current converter that reduces third harmonic distortion. An amplifier includes an input stage. The input stage includes a first voltage-to-current conversion stage and a second voltage-to-current conversion stage. The first voltage-to-current conversion stage is configured to provide an input to output gain with compressive nonlinearity. The second voltage-to-current stage is cascaded with the first voltage-to-current conversion stage. An input of the second voltage-to-current stage is connected to an output of the first voltage-to-current conversion stage. The second voltage-to-current conversion stage is configured to provide an input to output gain with expansive nonlinearity.Type: GrantFiled: June 1, 2018Date of Patent: December 17, 2019Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Bharath Karthik Vasan, Srinivas K. Pulijala, Steven G. Brantley
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Publication number: 20190334490Abstract: In examples, a system comprises a differential amplifier coupled to a parasitic capacitor positioned between a first node and a first reference voltage source. The system comprises a buffer amplifier having an input terminal and an output terminal, the input terminal coupled to the first node and the output terminal coupled to a cancellation capacitor. The system includes a controlled current source coupled to the first node and the input terminal, the controlled current source coupled to a second reference voltage source. The system comprises a current sense circuit coupled to the cancellation capacitor and the second reference voltage source.Type: ApplicationFiled: April 30, 2018Publication date: October 31, 2019Inventors: Steven G. BRANTLEY, Bharath Karthik VASAN, Srinivas K. PULIJALA, Martijn SNOEIJ
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Patent number: 10461706Abstract: In examples, a system comprises a differential amplifier coupled to a parasitic capacitor positioned between a first node and a first reference voltage source. The system comprises a buffer amplifier having an input terminal and an output terminal, the input terminal coupled to the first node and the output terminal coupled to a cancellation capacitor. The system includes a controlled current source coupled to the first node and the input terminal, the controlled current source coupled to a second reference voltage source. The system comprises a current sense circuit coupled to the cancellation capacitor and the second reference voltage source.Type: GrantFiled: April 30, 2018Date of Patent: October 29, 2019Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Steven G. Brantley, Bharath Karthik Vasan, Srinivas K. Pulijala, Martijn Snoeij
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Publication number: 20190097587Abstract: A voltage-to-current converter that reduces third harmonic distortion. An amplifier includes an input stage. The input stage includes a first voltage-to-current conversion stage and a second voltage-to-current conversion stage. The first voltage-to-current conversion stage is configured to provide an input to output gain with compressive nonlinearity. The second voltage-to-current stage is cascaded with the first voltage-to-current conversion stage. An input of the second voltage-to-current stage is connected to an output of the first voltage-to-current conversion stage. The second voltage-to-current conversion stage is configured to provide an input to output gain with expansive nonlinearity.Type: ApplicationFiled: June 1, 2018Publication date: March 28, 2019Inventors: Bharath Karthik VASAN, Srinivas K. PULIJALA, Steven G. BRANTLEY
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Patent number: 10193501Abstract: An amplifier includes an amplifier input and an amplifier output. A compensation network is coupled to the amplifier output. The compensation network includes at least one RC network tuned to a frequency in which the amplifier operates. The compensation network provides at least one zero to compensate for at least one pole introduced by a load coupled to the amplifier output.Type: GrantFiled: January 22, 2018Date of Patent: January 29, 2019Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Srinivas K. Pulijala, Steven G. Brantley
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Patent number: 9985589Abstract: A voltage-to-current converter includes a first differential pair of transistors, a second differential pair of transistors, and a first resistor. The first differential pair of transistors includes a first transistor and a second transistor. An emitter of the first transistor is directly connected to an emitter of the second transistor. The second differential pair of transistors includes a third transistor and a fourth transistor. An emitter of the third transistor is directly connected to an emitter of the fourth transistor. The first resistor is connected to the emitter of the first transistor, the emitter of the second transistor, the emitter of the third transistor, and the emitter of the fourth transistor.Type: GrantFiled: August 19, 2016Date of Patent: May 29, 2018Assignee: Texas Instruments IncorporatedInventors: Srinivas K. Pulijala, Steven G. Brantley, Bharath K. Vasan
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Publication number: 20180145633Abstract: An amplifier includes an amplifier input and an amplifier output. A compensation network is coupled to the amplifier output. The compensation network includes at least one RC network tuned to a frequency in which the amplifier operates. The compensation network provides at least one zero to compensate for at least one pole introduced by a load coupled to the amplifier output.Type: ApplicationFiled: January 22, 2018Publication date: May 24, 2018Inventors: Srinivas K. Pulijala, Steven G. Brantley
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Patent number: 9954496Abstract: At least some embodiments are directed to a system comprising an amplifier containing a first bias current source and configured to provide an output voltage at a node, a gain stage coupled to the node and comprising a second bias current source, and a buffer stage coupled to the node and comprising third and fourth bias current sources and an additional set of bias current sources, the third and fourth bias current sources are able to activate output transistors that are configured to increase current provided to a load. The system also comprises a controller configured to activate the first bias current source, to activate the second bias current source after the first bias current source is activated, to activate the bias current sources in the set after the first bias current source is activated, and to activate the third and fourth bias current sources after the first and second bias current sources are activated and after the bias current sources in the set are activated.Type: GrantFiled: December 20, 2016Date of Patent: April 24, 2018Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Steven G. Brantley, Bharath Karthik Vasan, John Lawrence Caldwell
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Patent number: 9917553Abstract: A circuit and method for an audio op-amp that is configured to minimize crossover distortion between push and pull components of the audio op-amp. The audio op-amp includes an input stage that receives differential input signals and generates an output that amplifies the difference between the input signals. The audio op-amp further includes an output stage that receive the amplified signal and generate an audio output signal for playback by a speaker system. The output stage includes a diamond driver circuit that buffers the input stage from the speaker system, a boost circuit that includes a pair of boosting transistors that amplify the current of the amplified signal, and a biasing circuit that provides bias currents to the transistors of the boost circuit in a manner that minimizes crossover distortion between the boosting transistors.Type: GrantFiled: June 20, 2016Date of Patent: March 13, 2018Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Sergey V. Alenin, Steven G. Brantley
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Patent number: 9912294Abstract: An amplifier includes an amplifier input and an amplifier output. A compensation network is coupled to the amplifier output. The compensation network includes at least one RC network tuned to a frequency in which the amplifier operates. The compensation network provides at least one zero to compensate for at least one pole introduced by a load coupled to the amplifier output.Type: GrantFiled: January 30, 2017Date of Patent: March 6, 2018Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Srinivas K. Pulijala, Steven G. Brantley
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Publication number: 20170366142Abstract: A circuit and method for an audio op-amp that is configured to minimize crossover distortion between push and pull components of the audio op-amp. The audio op-amp includes an input stage that receives differential input signals and generates an output that amplifies the difference between the input signals. The audio op-amp further includes an output stage that receive the amplified signal and generate an audio output signal for playback by a speaker system. The output stage includes a diamond driver circuit that buffers the input stage from the speaker system, a boost circuit that includes a pair of boosting transistors that amplify the current of the amplified signal, and a biasing circuit that provides bias currents to the transistors of the boost circuit in a manner that minimizes crossover distortion between the boosting transistors.Type: ApplicationFiled: June 20, 2016Publication date: December 21, 2017Inventors: Sergey V. Alenin, Steven G. Brantley
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Publication number: 20170179893Abstract: At least some embodiments are directed to a system comprising an amplifier containing a first bias current source and configured to provide an output voltage at a node, a gain stage coupled to the node and comprising a second bias current source, and a buffer stage coupled to the node and comprising third and fourth bias current sources and an additional set of bias current sources, the third and fourth bias current sources are able to activate output transistors that are configured to increase current provided to a load. The system also comprises a controller configured to activate the first bias current source, to activate the second bias current source after the first bias current source is activated, to activate the bias current sources in the set after the first bias current source is activated, and to activate the third and fourth bias current sources after the first and second bias current sources are activated and after the bias current sources in the set are activated.Type: ApplicationFiled: December 20, 2016Publication date: June 22, 2017Inventors: Steven G. BRANTLEY, Bharath Karthik VASAN, John Lawrence CALDWELL
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Publication number: 20170141733Abstract: An amplifier includes an amplifier input and an amplifier output. A compensation network is coupled to the amplifier output. The compensation network includes at least one RC network tuned to a frequency in which the amplifier operates. The compensation network provides at least one zero to compensate for at least one pole introduced by a load coupled to the amplifier output.Type: ApplicationFiled: January 30, 2017Publication date: May 18, 2017Inventors: Srinivas K. Pulijala, Steven G. Brantley
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Patent number: 9595929Abstract: An amplifier includes an amplifier input and an amplifier output. A compensation network is coupled to the amplifier output. The compensation network includes at least one RC network tuned to a frequency in which the amplifier operates. The compensation network provides at least one zero to compensate for at least one pole introduced by a load coupled to the amplifier output.Type: GrantFiled: October 7, 2014Date of Patent: March 14, 2017Assignee: Texas Instruments IncorporatedInventors: Srinivas K. Pulijala, Steven G. Brantley
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Publication number: 20170054417Abstract: A voltage-to-current converter includes a first differential pair of transistors, a second differential pair of transistors, and a first resistor. The first differential pair of transistors includes a first transistor and a second transistor. An emitter of the first transistor is directly connected to an emitter of the second transistor. The second differential pair of transistors includes a third transistor and a fourth transistor. An emitter of the third transistor is directly connected to an emitter of the fourth transistor. The first resistor is connected to the emitter of the first transistor, the emitter of the second transistor, the emitter of the third transistor, and the emitter of the fourth transistor.Type: ApplicationFiled: August 19, 2016Publication date: February 23, 2017Inventors: Srinivas K. PULIJALA, Steven G. BRANTLEY, Bharath K. VASAN
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Patent number: 9467096Abstract: One example includes an amplifier system. The system includes a precision amplifier portion comprising a first input stage configured to receive an input voltage and a first output stage configured to generate an output voltage at the first output stage based on the input voltage. The system also includes a slew amplifier portion arranged in parallel with the precision amplifier portion and comprising a second input stage that receives the input voltage and a second output stage. The slew amplifier portion can be activated in response to a detected slew condition associated with the input voltage to generate the output voltage based on the input voltage.Type: GrantFiled: March 9, 2015Date of Patent: October 11, 2016Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Srinivas K. Pulijala, Steven G. Brantley
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Publication number: 20150263674Abstract: One example includes an amplifier system. The system includes a precision amplifier portion comprising a first input stage configured to receive an input voltage and a first output stage configured to generate an output voltage at the first output stage based on the input voltage. The system also includes a slew amplifier portion arranged in parallel with the precision amplifier portion and comprising a second input stage that receives the input voltage and a second output stage. The slew amplifier portion can be activated in response to a detected slew condition associated with the input voltage to generate the output voltage based on the input voltage.Type: ApplicationFiled: March 9, 2015Publication date: September 17, 2015Inventors: SRINIVAS K. PULIJALA, Steven G. Brantley
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Publication number: 20150102858Abstract: An amplifier includes an amplifier input and an amplifier output. A compensation network is coupled to the amplifier output. The compensation network includes at least one RC network tuned to a frequency in which the amplifier operates. The compensation network provides at least one zero to compensate for at least one pole introduced by a load coupled to the amplifier output.Type: ApplicationFiled: October 7, 2014Publication date: April 16, 2015Inventors: Srinivas K. Pulijala, Steven G. Brantley