Abstract: Disclosed herein are embodiments of an automated, fast and efficient method of generating a customized compact model that represents a semiconductor device at the chip, wafer or multi-wafer level in a specific manufacturing environment. Specifically, measurement data is collected from a specific manufacturing environment and sorted by channel lengths. Then, an optimizer is used to generate customized modeling parameters based on the measurement data. The optimization processes is a multi-step process. First, a first set of modeling parameters is generated based on measurement data associated with a long channel length. Second, a second set of modeling parameters is generated based on the first set and on measurement data associated with a short channel length. Finally, the customized modeling parameters are generated based on both the first set and the second set. The customized modeling parameters are used to generate a customized compact device model representative of the specific manufacturing environment.

Abstract: A method and system are disclosed for preserving measured temperature and geometric behavior of a hardware model while adjusting the model to match specified target values. In one embodiment, the method includes measuring a characteristic of an integrated circuit (IC) chip at a plurality of temperatures; modeling to form a hardware model for the characteristic versus temperature based on the measuring; obtaining a known first target value of the characteristic for at least one temperature in the hardware model; determining a plurality of second target values for the characteristic for a corresponding plurality of temperatures in the hardware model; and modeling to form a target model for the characteristic based on the first known target value and the plurality of second target values.

Abstract: A method and system are disclosed for preserving measured temperature and geometric behavior of a hardware model while adjusting the model to match specified target values. In one embodiment, the method includes measuring a characteristic of an integrated circuit (IC) chip at a plurality of temperatures; modeling to form a hardware model for the characteristic versus temperature based on the measuring; obtaining a known first target value of the characteristic for at least one temperature in the hardware model; determining a plurality of second target values for the characteristic for a corresponding plurality of temperatures in the hardware model; and modeling to form a target model for the characteristic based on the first known target value and the plurality of second target values.

Abstract: Disclosed herein are embodiments of an automated, fast and efficient method of generating a customized compact model that represents a semiconductor device at the chip, wafer or multi-wafer level in a specific manufacturing environment. Specifically, measurement data is collected from a specific manufacturing environment and sorted by channel lengths. Then, an optimizer is used to generate customized modeling parameters based on the measurement data. The optimization processes is a multi-step process. First, a first set of modeling parameters is generated based on measurement data associated with a long channel length. Second, a second set of modeling parameters is generated based on the first set and on measurement data associated with a short channel length. Finally, the customized modeling parameters are generated based on both the first set and the second set. The customized modeling parameters are used to generate a customized compact device model representative of the specific manufacturing environment.

Abstract: A method (300) of placing a to-be-placed integrated circuit macro (404) adjacent one or more already-placed macros (400) aboard an integrated circuit chip (100). The method includes the step of performing a canonical ordering of the edges of the to-be-placed and already placed macros. Then, an edge constraint vector (500, 526) is generated for each active edge (668) of the already-placed macro(s) and each edge of the to-be-placed macro. Each of the edge constraint vectors of the to-be-placed macro is compared to each edge constraint vector of the active edge(s) using a string matching algorithm so as to determine whether any edges of the to-be-placed macro are compatible with any active edges of the already-placed macro(s). The method may be implemented in a CAD system (600).