Patents by Inventor Steven Graham Brantley

Steven Graham Brantley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190190471
    Abstract: An operational amplifier includes an input stage configured to receive a first input voltage and a second input voltage and a slew boost circuit coupled to the input stage and configured to selectively increase current through the input stage. The operational amplifier also includes an output stage coupled to the input stage and configured to generate an output voltage, and a slew boost disable circuit configured to assert a control signal to the slew boost circuit to disable the slew boost circuit. The slew boost circuit is disabled when both: the first input voltage being more than a first threshold voltage different from the second input voltage and the output voltage failing to change by more than a second threshold rate.
    Type: Application
    Filed: December 20, 2017
    Publication date: June 20, 2019
    Inventors: Martijn Fridus SNOEIJ, Steven Graham BRANTLEY
  • Patent number: 9837973
    Abstract: A differential input circuit (FIG. 3A) is disclosed. The circuit includes a first input terminal (drain of 310) and a second input terminal (drain of 312). A first input transistor (310) has a first control terminal and has a current path coupled to the first input terminal. A second input transistor (312) has a second control terminal and has a current path coupled to the second input terminal. A third transistor (306) has a third control terminal and has a current path between a first differential input terminal (Vin+) and the first control terminal. A fourth transistor (308) has a fourth control terminal and has a current path between a second differential input terminal (Vin?) and the second control terminal.
    Type: Grant
    Filed: July 25, 2013
    Date of Patent: December 5, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Steven Graham Brantley, Vadim Valerievich Ivanov
  • Publication number: 20150028949
    Abstract: A differential input circuit (FIG. 3A) is disclosed. The circuit includes a first input terminal (drain of 310) and a second input terminal (drain of 312). A first input transistor (310) has a first control terminal and has a current path coupled to the first input terminal. A second input transistor (312) has a second control terminal and has a current path coupled to the second input terminal. A third transistor (306) has a third control terminal and has a current path between a first differential input terminal (Vin+) and the first control terminal. A fourth transistor (308) has a fourth control terminal and has a current path between a second differential input terminal (Vin?) and the second control terminal.
    Type: Application
    Filed: July 25, 2013
    Publication date: January 29, 2015
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Steven Graham Brantley, Vadim Valerievich Ivanov
  • Patent number: 8050148
    Abstract: One embodiment of an apparatus for generating a time stamp includes a clock input, an event signal input and a time stamp output. A DLL is connected to the clock input, with a plurality of delay elements inside the DLL. An output of each of the delay elements is connected to a data input on a latch. An event signal input is connected to an enable input on each of the latches. An output of each of the latches is connected to the time stamp output. The apparatus is adapted to produce a value on the time stamp output indicating a point at which the event signal input transitions between transitions on the clock input.
    Type: Grant
    Filed: August 21, 2008
    Date of Patent: November 1, 2011
    Assignee: Texas Instruments Incorporated
    Inventors: Steven Graham Brantley, James Richard MacLean, Francesco Cavaliere
  • Patent number: 7930121
    Abstract: Traditionally, time stamp circuits have been used for precise digital time measurements. The resolution of these types of circuits, though, was generally limited by clock speed. Here, an apparatus is provided that performs time stamp operations and is not generally limited by clock speed. This apparatus generally uses an interpolator, counter, lathing circuits, and a synchronizer. Typically, the interpolator provides a residue signal to the synchronizer, and the synchronizer can determines whether to add the interpolation signal to a counter state based at least in part on a comparison of an event signal and the residue signal.
    Type: Grant
    Filed: August 21, 2008
    Date of Patent: April 19, 2011
    Assignee: Texas Instrument Incorporated
    Inventors: Steven Graham Brantley, James Richard MacLean, Francesco Cavaliere
  • Publication number: 20100001777
    Abstract: One embodiment of an apparatus for generating a time stamp includes a clock input, an event signal input and a time stamp output. A DLL is connected to the clock input, with a plurality of delay elements inside the DLL. An output of each of the delay elements is connected to a data input on a latch. An event signal input is connected to an enable input on each of the latches. An output of each of the latches is connected to the time stamp output. The apparatus is adapted to produce a value on the time stamp output indicating a point at which the event signal input transitions between transitions on the clock input.
    Type: Application
    Filed: August 21, 2008
    Publication date: January 7, 2010
    Applicant: Texas Instruments Incorporated
    Inventors: Steven Graham Brantley, James Richard MacLean, Francesco Cavaliere
  • Publication number: 20100001769
    Abstract: Various apparatuses and methods for synchronizing time stamps are disclosed herein. For example, some embodiments of the present invention provide apparatuses for synchronizing a coarse time stamp with a fine time stamp. Such apparatuses include an event signal input, a clock input, a coarse time stamp generator having an input connected to the clock input, and a fine time stamp generator having a first input connected to the clock input, a second input connected to the event signal input, and a synchronization signal output. The apparatuses also include a synchronizer having a first input connected to the clock input, a second input connected to the event signal input, a third input connected to the synchronization signal output and an output connected to the coarse time stamp generator. The synchronizer is adapted to synchronize the coarse time stamp generator to the fine time stamp generator based at least in part on the synchronization signal output.
    Type: Application
    Filed: August 21, 2008
    Publication date: January 7, 2010
    Applicant: Texas Instruments Incorporated
    Inventors: Steven Graham Brantley, James Richard MacLean, Francesco Cavaliere
  • Patent number: 6590436
    Abstract: A system and method is provided for translating a wide common mode voltage range into a narrow common mode voltage range. The system and method extend the common mode voltage range of functional devices beyond the supply rails of the functional device, while keeping the differential signal loss to a minimum. The system and method translate a common mode input signal from a wide common mode voltage range into a narrow common mode voltage range utilizing a feedback technique.
    Type: Grant
    Filed: October 12, 2001
    Date of Patent: July 8, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Ricky Dale Jordanger, Vinodh K. Nalluri, Srikanth Gondi, Steven Graham Brantley
  • Publication number: 20030071673
    Abstract: A system and method is provided for translating a wide common mode voltage range into a narrow common mode voltage range. The system and method extend the common mode voltage range of functional devices beyond the supply rails of the functional device, while keeping the differential signal loss to a minimum. The system and method translate a common mode input signal from a wide common mode voltage range into a narrow common mode voltage range utilizing a feedback technique.
    Type: Application
    Filed: October 12, 2001
    Publication date: April 17, 2003
    Inventors: Ricky Dale Jordanger, Vinodh K. Nalluri, Srikanth Gondi, Steven Graham Brantley