Patents by Inventor Steven H. Johnston

Steven H. Johnston has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8106485
    Abstract: A structure and method for removing damages of a dual damascene structure after plasma etching. The method includes the use of sublimation processes to deposit reactive material onto the damaged regions and conditions to achieve a controlled removal of the damaged region. Furthermore a semiconductor structure includes a dual damascene structure that has been treated by the method.
    Type: Grant
    Filed: March 7, 2008
    Date of Patent: January 31, 2012
    Assignee: International Business Machines Corporation
    Inventors: William G. America, Steven H. Johnston, Brian W. Messenger
  • Publication number: 20080224273
    Abstract: A structure and method for removing damages of a dual damascene structure after plasma etching. The method includes the use of sublimation processes to deposit reactive material onto the damaged regions and conditions to achieve a controlled removal of the damaged region. Furthermore a semiconductor structure includes a dual damascene structure that has been treated by the method.
    Type: Application
    Filed: March 7, 2008
    Publication date: September 18, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: William G. AMERICA, Steven H. Johnston, Brian W. Messenger
  • Patent number: 7368393
    Abstract: A method for removing damages of a dual damascene structure after plasma etching is disclosed. The method comprises the use of sublimation processes to deposit reactive material onto the damaged regions and conditions to achieve a controlled removal of the damaged region. Furthermore a semiconductor structure comprising a dual damascene structure that has been treated by the method is disclosed.
    Type: Grant
    Filed: April 20, 2006
    Date of Patent: May 6, 2008
    Assignee: International Business Machines Corporation
    Inventors: William G. America, Steven H. Johnston, Brian W. Messenger
  • Patent number: 7129159
    Abstract: A dual damascene conductor structure is formed on a substrate with an exposed conductor on top covered by a buried cap, a dielectric layer (DL) and an organic layer (OL). Form a lower via hard mask layers over the OL and form a top trench patterning hard mask over the lower, via hard mask. Form a trench pattern hole through the trench hard mask layer; and form a via pattern hole through the via hard mask layer in a region exposed below the trench pattern hole. Etch a via pattern hole into the OL and then etch a via pattern hole down into the DL. Etch away the trench pattern layer and the OL layer below the trench pattern hole. Etch the via hole through the DL exposing the cap while simultaneously partially etching the DL to a final trench depth to form a trench in the DL below the trench pattern hole, with the trench having a bottom above the cap and sidewalls in the DL.
    Type: Grant
    Filed: August 17, 2004
    Date of Patent: October 31, 2006
    Assignee: International Business Machines Corporation
    Inventors: William G. America, Steven H. Johnston