Abstract: An electronic circuit includes a first pin corresponding to a reference signal and a second pin corresponding to an external resistor, the external resistor being connected on a first side to the second pin and connected on a second side to ground. The apparatus also includes a first oscillator having a first frequency loop configured to: receive, via the first pin, the reference signal; receive, via the second pin, a current associated with voltage applied to the external resistor; and lock a first frequency output at a frequency associated with the reference signal. The apparatus also includes a second oscillator having a second frequency loop configured to: receive the first frequency output; scale the frequency of the first frequency output; and lock a second frequency output at the scaled frequency of the first frequency output.

Abstract: A method for forming trench isolation oxide using doped silicon dioxide which is reflowed at elevated temperatures to collapse any voids therein and produce surface planarity. An underlying layered composite selected from oxide, polysilicon and silicon nitride permits the formation and reflow of the doped isolation oxide and remains in place in the trench to contribute to the trench isolation structure.

Abstract: A method of forming improved contacts between interconnect layers of an integrated circuit including sputter depositing a metallic lower layer of interconnect material on a target, and patterning the layer of interconnect material to form an interconnect layer. A dielectric layer is then deposited over the interconnect layer, and via holes are formed through the dielectric layer. A polysilicon layer is deposited over the dielectric layer, including the side walls and bottom of the via holes, and then removed from the dielectric layer and the bottom of the via holes, by anisotropic etching, leaving polysilicon on the side walls. Tungsten is then selectively deposited on the bottom and side walls of the via holes forming metal plugs therein, and a second layer of interconnect material is sputter deposited over the dielectric layer and the metal plugs in the via holes thereby forming contacts between the first and second layers of interconnect material.

Abstract: A method for forming trench isolation oxide using doped silicon dioxide which is reflowed at elevated temperatures to collapse any voids therein and produce surface planarity. An underlying layered composite selected from oxide, polysilicon and silicon nitride permits the formation and reflow of the doped isolation oxide and remains in place in the trench to contribute to the trench isolation structure.

Abstract: A method of forming on a substrate a layer of silicon-rich metal silicide such as tungsten silicide, WSi.sub.x where x>2 by cosputtering a tungsten disilicide (WSi.sub.2) target and a doped silicon target on to the substrate which is maintained at room temperature. When the silicon-rich silicide is deposited on a doped polysilicon layer the resulting silicon-rich metal silicide/polysilicon sandwich layer has a low resistivity and is suitable for forming therefrom gates and interconnecting conductors for integrated circuit devices.