Abstract: According to a first aspect of the invention, a power control switch comprises two solid state switching elements (14, 15) in parallel, the second switching element (15) having a higher resistance but faster turn-off time than the first element. In operation the switch is pulse width modulated and the first element is switched off after the second element to establish a guard period, the duration of which is controlled in dependence upon the duty cycle to provide efficient switching. According to a second aspect of the invention a power control switch comprises a switching element (14 or 15) controlled by a field programmable gate array (5) which is preferably programmed by an erasable programmable read only memory (EPROM), thereby providing a reconfigurable control means.