Abstract: A semiconductor package having a substrate and a die includes a plurality of conductive posts attached to the substrate and bonded to an active surface of the die via a plurality of corresponding microbumps. The conductive posts are flexible and extend beyond the top surface of the substrate a sufficient distance to absorb lateral forces exerted upon the microbumps.

Abstract: A system replicates the rapid temperature increases that are believed to cause microbump failures in certain applications of programmable logic devices (PLDs). The system configures a PLD under test with a circuit that switches a large amount of current and generates a large amount of heat when the circuit is clocked. The system monitors the temperature of the PLD and controls the switching of the circuit to achieve a predetermined temperature within a predetermined time period. The PLD is cooled, and the thermal cycling is repeated. The system detects microbump failures and communicates failure data to a computer for logging and analysis.

Abstract: Structures that provide decoupling capacitance to packaged IC devices with reduced capacitor and via parasitic inductance. A capacitive interposer structure is physically interposed between the packaged IC and the PCB, thus eliminating the leads and vias that traverse the PCB in known structures. A capacitive interposer is mounted to a PCB and the packaged IC is mounted on the interposer. The interposer has an array of lands on an upper surface, to which the packaged IC is coupled, and an array of terminals on a lower surface, which are coupled to the PCB. Electrically conductive vias interconnect each land with an associated terminal on the opposite surface of the interposer. Within the interposer, layers of a conductive material alternate with layers of a dielectric material, thus forming parallel plate capacitors between adjacent dielectric layers. Each conductive layer is either electrically coupled to, or is electrically isolated from, each via.

Abstract: Structures that provide decoupling capacitance to packaged IC devices with reduced capacitor and via parasitic inductance. A capacitive interposer structure is physically interposed between the packaged IC and the PCB, thus eliminating the leads and vias that traverse the PCB in known structures. A capacitive interposer is mounted to a PCB and the packaged IC is mounted on the interposer. The interposer has an array of lands on an upper surface, to which the packaged IC is coupled, and an array of terminals on a lower surface, which are coupled to the PCB. Electrically conductive vias interconnect each land with an associated terminal on the opposite surface of the interposer. Within the interposer, layers of a conductive material alternate with layers of a dielectric material, thus forming parallel plate capacitors between adjacent dielectric layers. Each conductive layer is either electrically coupled to, or is electrically isolated from, each via.

Abstract: A vehicle mounted automobile "wheel lift" towing mechanism having a power actuated lift boom vertically movable between raised and lowered positions along angularly inclined parallel tracks having cam members operable to impart predetermined vertical tilting movements to the boom; the latter at ground engagement being tiltable to conform to variations in ground slope; power actuation of the boom being responsive to extension and contraction of a horizontal lift cylinder assembly having a linearly movable piston. Manually operable wheel engaging apparatus, is carried by the lift boom for positively coupling a pair of vehicle wheels to the towing mechanism and includes a pair of pivotally movable wheel restraints operable to swing arcuately about vertical axes from positions laterally outwardly of adjacently opposed vehicle wheels to positions behind such wheels for restraining the latter against opposing wheel chocks.