Abstract: A data processing network includes multiple processing devices, multiple memory cards of main storage, and a main storage interface shared by the processors and memory cards. Each of the memory cards includes memory arrays, a hold register for retaining a data pattern stored to the arrays, a compare register and logic circuity. For a memory array diagnostic test, one of the processing devices sends a compare command (including address information) and the data pattern to one of the memory cards. In response, the logic circuity on the selected memory card stores the data pattern to its hold register and writes the data pattern into its memory arrays, then reads the data out of the memory arrays into its compare register. The contents of the compare and hold registers are compared, and an error indication provided to the processing device in the event that these registers' contents are not the same.

Abstract: An electron beam transversely scans a planar surface having a longitudinal structure projecting therefrom. Two Everhart-Thornley detectors are positioned on transversely opposite sides, respectively, of the structure. During a first scan, only one detector is turned ON to produce a first electric signal having a pronounced amplitude dip corresponding to the structure's bottom edge which is facing away from the ON detector. During the next scan, only the other detector is turned ON to produce a second electric signal having a pronounced amplitude dip corresponding to the structure's other bottom edge which is now facing away from the ON detector. The two signals are combined to produce a composite signal whose waveform comprises two enhanced and segmented dips corresponding precisely to the locations of the structure's two bottom edges.