Patents by Inventor Steven J. Franck

Steven J. Franck has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5596265
    Abstract: The preferred embodiment voltage regulator exhibits improved stability by offsetting changes in the output impedance of the regulator due to changes in load current. This compensation occurs virtually instantaneously with a change in load current. This enables an output capacitor to be selected primarily based upon filtering requirements rather than on frequency compensation requirements. Also in the preferred embodiment, a depletion mode pass transistor is used as the output transistor. A PMOS transistor on/off switch is connected between the source of the pass transistor and the output terminal of the regulator to effectively turn the regulator on or off without shutting down the depletion mode pass transistor. This avoids the need to form a negative supply voltage generator. An improved band gap voltage reference generator is also described which introduces a beta correction factor into the output voltage which offsets changes in beta due to process variations and other conditions.
    Type: Grant
    Filed: February 14, 1995
    Date of Patent: January 21, 1997
    Assignee: Siliconix incorporated
    Inventors: Robert S. Wrathall, Steven J. Franck
  • Patent number: 5559424
    Abstract: The preferred embodiment voltage regulator exhibits improved stability by offsetting changes in the output impedance of the regulator due to changes in load current. This compensation occurs virtually instantaneously with a change in load current. This enables an output capacitor to be selected primarily based upon filtering requirements rather than on frequency compensation requirements. Also in the preferred embodiment, a depletion mode pass transistor is used as the output transistor. A PMOS transistor on/off switch is connected between the source of the pass transistor and the output terminal of the regulator to effectively turn the regulator on or off without shutting down the depletion mode pass transistor. This avoids the need to form a negative supply voltage generator. An improved band gap voltage reference generator is also described which introduces a beta correction factor into the output voltage which offsets changes in beta due to process variations and other conditions.
    Type: Grant
    Filed: October 20, 1994
    Date of Patent: September 24, 1996
    Assignee: Siliconix Incorporated
    Inventors: Robert S. Wrathall, Steven J. Franck
  • Patent number: 5506496
    Abstract: The preferred embodiment voltage regulator exhibits improved stability by offsetting changes in the output impedance of the regulator due to changes in load current. This compensation occurs virtually instantaneously with a change in load current. This enables an output capacitor to be selected primarily based upon filtering requirements rather than on frequency compensation requirements. Also in the preferred embodiment, a depletion mode pass transistor is used as the output transistor. A PMOS transistor on/off switch is connected between the source of the pass transistor and the output terminal of the regulator to effectively turn the regulator on or off without shutting down the depletion mode pass transistor. This avoids the need to form a negative supply voltage generator. An improved band gap voltage reference generator is also described which introduces a beta correction factor into the output voltage which offsets changes in beta due to process variations and other conditions.
    Type: Grant
    Filed: February 14, 1995
    Date of Patent: April 9, 1996
    Assignee: Siliconix Incorporated
    Inventors: Robert S. Wrathall, Steven J. Franck