Patents by Inventor Steven J. Frank
Steven J. Frank has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11126350Abstract: Embodiments of the invention provide systems and methods to implement an object memory fabric. Object memory modules may include object storage storing memory objects, memory object meta-data, and a memory module object directory. Each memory object and/or memory object portion may be created natively within the object memory module and may be a managed at a memory layer. The memory module object directory may index all memory objects and/or portions within the object memory module. A hierarchy of object routers may communicatively couple the object memory modules. Each object router may maintain an object cache state for the memory objects and/or portions contained in object memory modules below the object router in the hierarchy. The hierarchy, based on the object cache state, may behave in aggregate as a single object directory communicatively coupled to all object memory modules and to process requests based on the object cache state.Type: GrantFiled: September 11, 2019Date of Patent: September 21, 2021Assignee: Ultrata, LLCInventors: Steven J. Frank, Larry Reback
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Patent number: 11086521Abstract: Embodiments of the invention provide systems and methods for managing processing, memory, storage, network, and cloud computing to significantly improve the efficiency and performance of processing nodes. More specifically, embodiments of the present invention are directed to an instruction set of an object memory fabric. This object memory fabric instruction set can be used to provide a unique instruction model based on triggers defined in metadata of the memory objects. This model represents a dynamic dataflow method of execution in which processes are performed based on actual dependencies of the memory objects. This provides a high degree of memory and execution parallelism which in turn provides tolerance of variations in access delays between memory objects. In this model, sequences of instructions are executed and managed based on data access. These sequences can be of arbitrary length but short sequences are more efficient and provide greater parallelism.Type: GrantFiled: January 20, 2016Date of Patent: August 10, 2021Assignee: Ultrata, LLCInventors: Steven J. Frank, Larry Reback
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Patent number: 10922005Abstract: Embodiments of the invention provide systems and methods for managing processing, memory, storage, network, and cloud computing to significantly improve the efficiency and performance of processing nodes. More specifically, embodiments of the present invention are directed to an instruction set of an object memory fabric. This object memory fabric instruction set can include trigger instructions defined in metadata for a particular memory object. Each trigger instruction can comprise a single instruction and action based on reference to a specific object to initiate or perform defined actions such as pre-fetching other objects or executing a trigger program.Type: GrantFiled: March 10, 2020Date of Patent: February 16, 2021Assignee: Ultrata, LLCInventors: Steven J. Frank, Larry Reback
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Patent number: 10895992Abstract: According to one embodiment, a hardware-based processing node of a plurality of hardware-based processing nodes in an object memory fabric can comprise a memory module storing and managing a plurality of memory objects in a hierarchy of the object memory fabric. Each memory object can be created natively within the memory module, accessed using a single memory reference instruction without Input/Output (I/O) instructions, and managed by the memory module at a single memory layer. The object memory fabric can distribute and track the memory objects across the hierarchy of the object memory fabric and the plurality of hardware-based processing nodes on a per-object basis. Distributing the memory objects across the hierarchy of the object memory fabric and the plurality of hardware-based processing nodes can comprise storing, on a per-object basis, each memory object on two or more nodes of the plurality of hardware-based processing nodes of the object memory fabric.Type: GrantFiled: January 22, 2019Date of Patent: January 19, 2021Assignee: Ultrata LLCInventors: Steven J. Frank, Larry Reback
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Patent number: 10859508Abstract: Apparatus and methods for evaluating the accuracy of deformable image registration (DIR) systems. Certain aspects may include a base and a support member coupled to the base, where the support member is configured to rotate about a first axis with respect to the base. Particular aspects may include a housing coupled to the support member, where the housing is configured to rotate about a second axis with respect to the support member. Specific aspects may include an insert coupled to the housing, where the insert is configured to rotate about a third axis with respect to the housing.Type: GrantFiled: May 29, 2019Date of Patent: December 8, 2020Assignee: Board of Regents, The University of Texas SystemInventors: Richard Wu, Jinzhong Yang, Paul Wisdom, Amy Liu, Ronald Zhu, Steven J. Frank
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Publication number: 20200379656Abstract: According to one embodiment, a hardware-based processing node of a plurality of hardware-based processing nodes in an object memory fabric can comprise a memory module storing and managing a plurality of memory objects in a hierarchy of the object memory fabric. Each memory object can be created natively within the memory module, accessed using a single memory reference instruction without Input/Output (I/O) instructions, and managed by the memory module at a single memory layer. The object memory fabric can utilize a memory fabric protocol between the hardware-based processing node and one or more other nodes of the plurality of hardware-based processing nodes to distribute and track the memory objects across the object memory fabric. The memory fabric protocol can be utilized across a dedicated link or across a shared link between the hardware-based processing node and one or more other nodes of the plurality of hardware-based processing nodes.Type: ApplicationFiled: August 18, 2020Publication date: December 3, 2020Inventors: Steven J. Frank, Larry Reback
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Publication number: 20200363956Abstract: Embodiments of the invention provide systems and methods for managing processing, memory, storage, network, and cloud computing to significantly improve the efficiency and performance of processing nodes. Embodiments can implement an object memory fabric including object memory modules storing memory objects created natively within the object memory module and may be a managed at a memory layer. The memory module object directory may index all memory objects within the object memory module. A hierarchy of object routers communicatively coupling the object memory modules may each include a router object directory that indexes all memory objects and portions contained in object memory modules below the object router in the hierarchy. The hierarchy of object routers may behave in aggregate as a single object directory communicatively coupled to all object memory modules and to process requests based on the router object directories.Type: ApplicationFiled: August 6, 2020Publication date: November 19, 2020Inventors: Steven J. Frank, Larry Reback
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Publication number: 20200356298Abstract: Embodiments of the invention provide systems and methods for managing processing, memory, storage, network, and cloud computing to significantly improve the efficiency and performance of processing nodes. More specifically, embodiments of the present invention are directed to a hardware-based processing node of an object memory fabric.Type: ApplicationFiled: May 26, 2020Publication date: November 12, 2020Inventors: Steven J. Frank, Larry Reback
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Patent number: 10809923Abstract: According to one embodiment, a hardware-based processing node of a plurality of hardware-based processing nodes in an object memory fabric can comprise a memory module storing and managing a plurality of memory objects in a hierarchy of the object memory fabric. Each memory object can be created natively within the memory module, accessed using a single memory reference instruction without Input/Output (I/O) instructions, and managed by the memory module at a single memory layer. The object memory fabric can utilize a memory fabric protocol between the hardware-based processing node and one or more other nodes of the plurality of hardware-based processing nodes to distribute and track the memory objects across the object memory fabric. The memory fabric protocol can be utilized across a dedicated link or across a shared link between the hardware-based processing node and one or more other nodes of the plurality of hardware-based processing nodes.Type: GrantFiled: February 4, 2019Date of Patent: October 20, 2020Assignee: Ultrata, LLCInventors: Steven J. Frank, Larry Reback
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Patent number: 10768814Abstract: Embodiments of the invention provide systems and methods for managing processing, memory, storage, network, and cloud computing to significantly improve the efficiency and performance of processing nodes. Embodiments can implement an object memory fabric including object memory modules storing memory objects created natively within the object memory module and may be a managed at a memory layer. The memory module object directory may index all memory objects within the object memory module. A hierarchy of object routers communicatively coupling the object memory modules may each include a router object directory that indexes all memory objects and portions contained in object memory modules below the object router in the hierarchy. The hierarchy of object routers may behave in aggregate as a single object directory communicatively coupled to all object memory modules and to process requests based on the router object directories.Type: GrantFiled: April 6, 2018Date of Patent: September 8, 2020Assignee: Ultrata, LLCInventors: Steven J. Frank, Larry Reback
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Publication number: 20200210092Abstract: Embodiments of the invention provide systems and methods for managing processing, memory, storage, network, and cloud computing to significantly improve the efficiency and performance of processing nodes. More specifically, embodiments of the present invention are directed to an instruction set of an object memory fabric. This object memory fabric instruction set can include trigger instructions defined in metadata for a particular memory object. Each trigger instruction can comprise a single instruction and action based on reference to a specific object to initiate or perform defined actions such as pre-fetching other objects or executing a trigger program.Type: ApplicationFiled: March 10, 2020Publication date: July 2, 2020Inventors: Steven J. Frank, Larry Reback
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Patent number: 10698628Abstract: Embodiments of the invention provide systems and methods for managing processing, memory, storage, network, and cloud computing to significantly improve the efficiency and performance of processing nodes. More specifically, embodiments of the present invention are directed to a hardware-based processing node of an object memory fabric.Type: GrantFiled: May 31, 2016Date of Patent: June 30, 2020Assignee: Ultrata, LLCInventors: Steven J. Frank, Larry Reback
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Patent number: 10606504Abstract: Embodiments of the invention provide systems and methods for managing processing, memory, storage, network, and cloud computing to significantly improve the efficiency and performance of processing nodes. More specifically, embodiments of the present invention are directed to an instruction set of an object memory fabric. This object memory fabric instruction set can include trigger instructions defined in metadata for a particular memory object. Each trigger instruction can comprise a single instruction and action based on reference to a specific object to initiate or perform defined actions such as pre-fetching other objects or executing a trigger program.Type: GrantFiled: January 22, 2019Date of Patent: March 31, 2020Assignee: Ultrata, LLCInventors: Steven J. Frank, Larry Reback
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Publication number: 20200042226Abstract: Embodiments of the invention provide systems and methods for managing processing, memory, storage, network, and cloud computing to significantly improve the efficiency and performance of processing nodes. More specifically, embodiments of the present invention are directed to a hardware-based processing node of an object memory fabric.Type: ApplicationFiled: August 20, 2019Publication date: February 6, 2020Inventors: STEVEN J. FRANK, LARRY REBACK
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Publication number: 20200004423Abstract: Embodiments of the invention provide systems and methods to implement an object memory fabric. Object memory modules may include object storage storing memory objects, memory object meta-data, and a memory module object directory. Each memory object and/or memory object portion may be created natively within the object memory module and may be a managed at a memory layer. The memory module object directory may index all memory objects and/or portions within the object memory module. A hierarchy of object routers may communicatively couple the object memory modules. Each object router may maintain an object cache state for the memory objects and/or portions contained in object memory modules below the object router in the hierarchy. The hierarchy, based on the object cache state, may behave in aggregate as a single object directory communicatively coupled to all object memory modules and to process requests based on the object cache state.Type: ApplicationFiled: September 11, 2019Publication date: January 2, 2020Inventors: Steven J. Frank, Larry Reback
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Publication number: 20190369030Abstract: Apparatus and methods for evaluating the accuracy of deformable image registration (DIR) systems. Certain aspects may include a base and a support member coupled to the base, where the support member is configured to rotate about a first axis with respect to the base. Particular aspects may include a housing coupled to the support member, where the housing is configured to rotate about a second axis with respect to the support member. Specific aspects may include an insert coupled to the housing, where the insert is configured to rotate about a third axis with respect to the housing.Type: ApplicationFiled: May 29, 2019Publication date: December 5, 2019Inventors: Richard WU, Jinzhong YANG, Paul WISDOM, Amy LIU, Ronald ZHU, Steven J. FRANK
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Patent number: 10452268Abstract: Embodiments of the invention provide systems and methods to implement an object memory fabric. Object memory modules may include object storage storing memory objects, memory object meta-data, and a memory module object directory. Each memory object and/or memory object portion may be created natively within the object memory module and may be a managed at a memory layer. The memory module object directory may index all memory objects and/or portions within the object memory module. A hierarchy of object routers may communicatively couple the object memory modules. Each object router may maintain an object cache state for the memory objects and/or portions contained in object memory modules below the object router in the hierarchy. The hierarchy, based on the object cache state, may behave in aggregate as a single object directory communicatively coupled to all object memory modules and to process requests based on the object cache state.Type: GrantFiled: March 28, 2018Date of Patent: October 22, 2019Assignee: Ultrata, LLCInventors: Steven J Frank, Larry Reback
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Patent number: 10430109Abstract: Embodiments of the invention provide systems and methods for managing processing, memory, storage, network, and cloud computing to significantly improve the efficiency and performance of processing nodes. More specifically, embodiments of the present invention are directed to a hardware-based processing node of an object memory fabric.Type: GrantFiled: December 22, 2017Date of Patent: October 1, 2019Assignee: Ultrata, LLCInventors: Steven J. Frank, Larry Reback
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Publication number: 20190171361Abstract: A hardware-based processing node of an object memory fabric can comprise a memory module storing and managing one or more memory objects within an object-based memory space. Each memory object can be created natively within the memory module, accessed using a single memory reference instruction without Input/Output (I/O) instructions, and managed by the memory module at a single memory layer. The memory module can provide an interface layer below an application layer of a software stack. The interface layer can comprise one or more storage managers managing hardware of a processor and controlling portions of the object-based memory space visible to a virtual address space and physical address space of the processor. The storage managers can further provide an interface between the object-based memory space and an operating system executed by the processor and an alternate object memory based storage transparent to software using the interface layer.Type: ApplicationFiled: February 7, 2019Publication date: June 6, 2019Inventors: Steven J. Frank, Larry Reback
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Publication number: 20190171373Abstract: According to one embodiment, a hardware-based processing node of a plurality of hardware-based processing nodes in an object memory fabric can comprise a memory module storing and managing a plurality of memory objects in a hierarchy of the object memory fabric. Each memory object can be created natively within the memory module, accessed using a single memory reference instruction without Input/Output (I/O) instructions, and managed by the memory module at a single memory layer. The object memory fabric can utilize a memory fabric protocol between the hardware-based processing node and one or more other nodes of the plurality of hardware-based processing nodes to distribute and track the memory objects across the object memory fabric. The memory fabric protocol can be utilized across a dedicated link or across a shared link between the hardware-based processing node and one or more other nodes of the plurality of hardware-based processing nodes.Type: ApplicationFiled: February 4, 2019Publication date: June 6, 2019Inventors: Steven J. Frank, Larry Reback