Patents by Inventor Steven J. Jahr

Steven J. Jahr has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6078402
    Abstract: A peripheral device (such as a printer) locates shareable resources on an accessory by using an offset mechanism on the accessory. The offset mechanism includes one or more offset values stored in a first memory location on the accessory. The one or more offset values are indicative of offsets of one or more resources within the accessory memory. The one or more accessory resources are shareable with the peripheral device. A further offset value is stored in a second memory location on the accessory. The further offset value is indicative of an offset for determining the first memory location on the accessory. Additionally, a base address is stored in yet another memory location on the accessory and provides a general reference point for locating the first memory and accessory resources as mapped into the peripheral's memory. In a preferred embodiment, the offset mechanism of the present invention is implemented as an enhanced feature of the PCI Local Bus Specification.
    Type: Grant
    Filed: September 24, 1997
    Date of Patent: June 20, 2000
    Assignee: Hewlett-Packard Company
    Inventors: Todd A. Fischer, Harold C. Ockerse, Scott D. Bonar, Steven J. Jahr
  • Patent number: 6038621
    Abstract: A peripheral system includes (a) a peripheral device having peripheral memory located thereon, (b) at least one input/output (I/O) card communicating with the peripheral device, and (c) a means for managing the peripheral memory between the peripheral device and the at least one I/O card. In a preferred embodiment, the means for managing the peripheral memory includes (a) a means for determining, during normal operation, an optimum amount of peripheral memory for allocating to each I/O card, and (b) a means for allocating, during normal operation, the optimum amount of peripheral memory to each I/O card. A preferred method for managing memory, between a peripheral device, having peripheral memory thereon, and at least one input/output (I/O) card, includes (a) determining, during normal operation, an optimum amount of peripheral memory for allocating to each I/O card, and (b) allocating, during normal operation, the optimum amount of peripheral memory to each I/O card.
    Type: Grant
    Filed: November 4, 1996
    Date of Patent: March 14, 2000
    Assignee: Hewlett-Packard Company
    Inventors: Thomas S. Gale, Patrick W. Fulghum, Kevin N. Smith, Steven J. Jahr, James G. Wendt
  • Patent number: 5911054
    Abstract: Atomic list insertion is provided for multi-master bus operation where masters use different sized bus transactions that require special management techniques to prevent interleaved accesses from returning invalid data. The update of a list entry. Next field is made an atomic operation, where atomic is defined as indivisible. To this end, the list entry. Next field is subdivided into two parts and a terminator list entry is provided.
    Type: Grant
    Filed: April 29, 1997
    Date of Patent: June 8, 1999
    Assignee: Hewlett Packaged Company
    Inventors: Steven J. Jahr, Patrick A. Bueb