Abstract: A multi-path transceiver apparatus, method and system for implementation in a bidirectional antenna path by which a transceiver output signal is provided with a path independent from a separate signal path provided for incoming signals. The invention facilitates the amplification of transmitted signals without damaging the received signals and avoids modification to transceiver and bidirectional antenna hardware.

Abstract: Virtual device fixturing is used to test transistor products, such as LDMOS power amplifier products, in the final packaging and testing stage of device fabrication. The input and output impedance transformation networks of a typical test fixture are implemented in software. The impedance matching function, normally performed by the physical input and output impedance transformation networks of the fixture, is supplanted by de-embedded scatter parameter calibration files. Test equipment, such as a vector network analyzer, attaches to a universal test fixture, while the software scatter parameter components are responsible for making the calibrations necessary to present the device under test with a matching low impedance.

Abstract: A system, and methods of its use, for characterizing semiconductor wafers with enhanced S parameter contour mapping employ small signal scatter parameter measurements of a representative sample of die to create a contour map of a wafer surface. Those die which fail to meet performance specifications are marked as bad die before the wafer is sent to a back-end process, where the unmarked good die are extracted and assembled into working products. By using enhanced S parameter mapping for characterizing the die, only those die marked as bad die need be discarded. Thus, instead of scrapping an entire wafer die lot based on the failure of a single die from that wafer, the wafer sort yield may be dramatically increased. The increase in wafer sort yield in turn, increases total production yield.

Abstract: A cooling system for electronic components and printed circuit boards (PCBs) provides close thermal contact of a bulk coolant circulating through channels formed inside or on the surface of a multi-layer PCB carrying the electronic components, such that heat produced by the components is efficiently removed to a heat sink. The circulation channels may be formed by removing portions of layers, and inserting overlaying vias, during manufacturing or assembly of the PCB.

Abstract: A transistor package comprises a first layer in which a thermally conductive flange is integrated into a dielectric substrate layer, a transistor attached to the flange, and input and output contacts coupled to the transistor. The transistor package is attached to a circuit board such that its input and output contacts are electrically coupled to associated conductors on the circuit board. In one embodiment, the transistor package further comprises additional dielectric layers, bonded to the bottom layer, in which a top layer forms a lid covering the transistor. The layers intermediate the bottom and top layers have central areas cut away where the layers overlap the transistor, thereby forming an interior chamber in the package. Impedance matching networks may also be provided to couple the transistor input and output terminals to their respective contacts, where the matching networks tune the input and output impedances of the package.

Abstract: A transistor package comprises a first layer in which a thermally conductive flange is integrated into a dielectric substrate layer, a transistor attached to the flange, and input and output contacts coupled to the transistor. The transistor package is attached to a circuit board such that its input and output contacts are electrically coupled to associated conductors on the circuit board. In one embodiment, the transistor package further comprises additional dielectric layers, bonded to the bottom layer, in which a top layer forms a lid covering the transistor. The layers intermediate the bottom and top layers have central areas cut away where the layers overlap the transistor, thereby forming an interior chamber in the package. Impedance matching networks may also be provided to couple the transistor input and output terminals to their respective contacts, where the matching networks tune the input and output impedances of the package.

Abstract: A planar inverted-F antenna comprises an antenna coupled to an antenna ground plane having a ground plane extension that is at least partially perpendicular to the plane of the antenna. The antenna structure comprises a modular unit that may be installed in a plurality of disparate devices without unduly changing the performance profile of the antenna at the desired operating frequencies.

Abstract: Virtual device fixturing is used to test transistor products, such as LDMOS power amplifier products, in the final packaging and testing stage of device fabrication. The input and output impedance transformation networks of a typical test fixture are implemented in software. The impedance matching function, normally performed by the physical input and output impedance transformation networks of the fixture, is supplanted by de-embedded scatter parameter calibration files. Test equipment, such as a vector network analyzer, attaches to a universal test fixture, while the software scatter parameter components are responsible for making the calibrations necessary to present the device under test with a matching low impedance.

Abstract: A system, and methods of its use, for characterizing semiconductor wafers with enhanced S parameter contour mapping employ small signal scatter parameter measurements of a representative sample of die to create a contour map of a wafer surface. Those die which fail to meet performance specifications are marked as bad die before the wafer is sent to a back-end process, where the unmarked good die are extracted and assembled into working products. By using enhanced S parameter mapping for characterizing the die, only those die marked as bad die need be discarded. Thus, instead of scrapping an entire wafer die lot based on the failure of a single die from that wafer, the wafer sort yield may be dramatically increased. The increase in wafer sort yield in turn, increases total production yield.

Abstract: Disclosed is a multi-path transceiver apparatus, method and system for implementation in a bidirectional antenna path by which a transceiver output signal is provided a path independent from a separate signal path provided for incoming signals. The invention facilitates the amplification of transmitted signals without detriment to received signals and avoids modification to transceiver and bidirectional antenna hardware.

Abstract: Method for characterization of Laterally Diffused Metal Oxide Semiconductors (LDMOS) at the die reference plane. An LDMOS device is epoxied to a midsection for connection to a test fixture for characterization. The combined physical parameters of the LDMOS device and test fixture are determined. Next, the measurements obtained are adjusted for the physical parameters of the test fixture alone, isolating the physical parameters characterizing the LDMOS device at the die reference plane.

Abstract: A method and apparatus for monitoring the battery capacity of the battery backup system and for compensating the RF output power to increase the service availability of the cellular base station. The present invention provides compensation of RF output power when the battery back-up system is in use for a cellular base station. By monitoring the battery capacity and power consumption of the cellular base station, the RF output power can be compensated. This compensation in RF output power will increase the time that the cellular base station can operate within the battery backup mode. This therefore increases the cellular base station service availability and does not allow for any loss of network operator income.

Abstract: A system and method of predicting a life time of a device and determining a life time left for the device, includes a temperature sensor, disposed proximate to the device, sensing temperatures of the device at a plurality of time intervals; a memory, coupled to the sensor, recording the sensed temperatures from the sensor; and a controller, coupled to the memory, determining life time points of the device corresponding to the temperatures, calculating accumulated life time points of the device on account for the time intervals to predict the life time of the device. In operation, given a measured temperature, a life time left for the device is determined. Accordingly, the device can be replaced by a new device before it fails, thereby improving reliability of a system, such as a communication system at BTS (Base Transceiver Station).

Abstract: A system for cooling an electronic device comprising a heat sink including a channel having an inlet and an outlet, with the channel coupled to an airflow generation system that generates airflow between the inlet and outlet. Heat is removed from an electronic device by decreasing the cross-sectional area of the channel to provide a throttle at a location adjacent to where the channel traverses the electronic device. A plurality of throttles may be formed in the channel, each for cooling a separate electronic device. An airflow control valve is operably connected to the heat sink for controlling the amount of airflow through the heat sink. A device controller connected to the airflow control valve and the air generation system adjusts the airflow control valve according to temperature measurements collected from the electronic device and controls the operation of the air generation system.

Abstract: A power amplifier system for amplifying RF signals includes an RF signal feedback arrangement to compensate for the loss of RF output power from isolation ports of hybrid couplers in the system and reduces heat dissipated at the terminations, e.g., a resistor, or other components of the isolation ports of the hybrid couplers. The amplitude of the signals, which is not realized at either of the output ports of the power divider (one of the hybrid coupler) and/or either of the output ports of the power combiner (one of the hybrid coupler) at the termination of the isolation ports of the hybrid couplers, is fed back into the power amplifier system.

Abstract: A power amplifier to process an input signal includes an amplifying device operating at a quiescent point and a bias network that varies the quiescent point according to a frequency of the input signal. In a variant of this power amplifier, the bias network includes a compensation circuit to provide a bias signal that varies according to a frequency of the input signal and a bias circuit to vary the quiescent point according to the bias signal. In an alternative embodiment of the invention, a method of making a power amplifier includes steps of measuring a gain performance of an amplifying device at a plurality of frequencies, determining a desired quiescent point of the amplifying device at each frequency of the plurality of frequencies, and constructing a bias network that varies an operating quiescent point of the amplifying device according to a frequency of the input signal so that the operating quiescent point approximates the desired quiescent point at each frequency of the plurality of frequencies.

Abstract: A communication device combined with a portable radio telephone operates upon communication media and transceives signals representative of the communication media between the communication device and a remote station. The communication device includes a docking port into which a proximal end-side portion of the portable radio telephone is insertable to be positioned at a docking position. Once positioned at the docking position, the portable radio telephone is used as a hand-hold to support the communication device engaged together with the radio telephone.

Abstract: An LDMOS RF amplifier having a bias voltage generated through feedback around an LDMOS sense transistor has a sense transistor, a current sensing circuit that monitors current in the sense transistor, and a bias voltage generation circuit controlled by an output of the current sensing circuit. The bias voltage from the bias voltage generation circuit is applied to the gates of both the sense transistor and an LDMOS RF power amplifier transistor. An AC-coupled RF input signal is applied through typical impedance-matching circuitry to the gate of the RF power amplifier transistor, and an AC-coupled output signal is tapped from, and power applied to, the drain of the RF power amplifier transistor through impedance matching circuitry of the type known in the art.