Abstract: A driver circuit produces variable current output for an LED lighting system providing improved dimming capability and greater power efficiency when responding to industry standard lighting dimmers through the use of an input voltage monitoring circuit which variably controls the current output of a switching regulator. Output current modulation methods such as analog, PWM, Pulse Frequency Modulation, or other digital modulation, and combination or hybrid may be employed. The current invention marries such output modulation techniques with a control method which is derived through intelligent monitoring of the input voltage waveform. The circuit and method described is adapted to higher current applications such as LED lighting systems using the latest high-power LEDs.

Abstract: A control/driver circuit produces variable current output for a lighting system providing improved dimming and color-mixing capability by allowing digital modulation control in addition to analog control over a range of illumination intensities. The circuit and method described is preferably adapted to higher current applications such as LED lighting systems using high-power LEDs. The output current of the circuit varies in proportion to the voltage level of an analog control signal, and additionally in proportion to the relative duty cycle of a digital pulsed control input.

Abstract: A control/driver circuit produces variable current output for a lighting system providing improved dimming and color-mixing capability by allowing digital modulation control in addition to analog control over a range of illumination intensities. The circuit and method described is preferably adapted to higher current applications such as LED lighting systems using high-power LEDs. The output current of the circuit varies in proportion to the voltage level of an analog control signal, and additionally in proportion to the relative duty cycle of a digital pulsed control input.

Abstract: A control circuit for a lighting system allows analog control over a first range of illumination intensities in which the intensity of the illumination source varies in proportion to the voltage level of the control signal. The circuit provides for improved dimming and color mixing capability by allowing pulse width or frequency modulation control in addition to analog control over a second range of illumination intensities.

Abstract: A method of updating characters within a multiplexed display used for displaying events including dynamic events which occur at a relatively faster rate. The display characters representing dynamic events are refreshed at a higher refresh frequency and more frequently during each display cycle. A plurality of display drivers including at least one grid driver controls the update and enablement of characters within the multiplexed display.

Abstract: The invention greatly reduces common bus contention by allowing the semaphore test bit and set operations to be performed on each CPU's local bus. The semaphore lock bits are stored locally in high speed SRAM on each CPU, and coherency of the lock bits is maintained through a bus monitoring logic circuit on each CPU. A CPU wishing to take possession of a semaphore performs a local read of its semaphore memory, and spins locally until the lock bit is reset at which time it performs a local write to set the bit. When the semaphore lock bit is written, it will be updated locally, and at the same time the write operation will be sent out over the common bus. The bus monitoring logic on every other CPU will recognize the write operation and simultaneously update the corresponding lock bit in each local semaphore memory. This ability to read spin locally relieves the common bus from the great amount of traffic that occurs in typical systems that maintain the semaphore lock bits in common global memory.

Abstract: In a multiprocessor system with a common bus and a central arbitration controller, which samples the request status of every system agent, the arbitration controller grants bus accesses based on an arbitration scheme consisting of two rotating queues with a fixed priority between the queues.