Patents by Inventor Steven J. Munroe
Steven J. Munroe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9626168Abstract: An optimizing compiler includes a vector optimization mechanism that optimizes vector instructions by eliminating one or more vector element reverse operations. The compiler can generate code that includes multiple vector element reverse operations that are inserted by the compiler to account for a mismatch between the endian bias of the instruction and the endian preference indicated by the programmer or programming environment. The compiler then analyzes the code and reduces the number of vector element reverse operations to improve the run-time performance of the code.Type: GrantFiled: December 29, 2014Date of Patent: April 18, 2017Assignee: International Business Machines CorporationInventors: Michael Karl Gschwind, Jin Song Ji, Ronald Ian McIntosh, Steven J. Munroe, William J. Schmidt
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Patent number: 9619214Abstract: An optimizing compiler includes a vector optimization mechanism that optimizes vector instructions by eliminating one or more vector element reverse operations. The compiler can generate code that includes multiple vector element reverse operations that are inserted by the compiler to account for a mismatch between the endian bias of the instruction and the endian preference indicated by the programmer or programming environment. The compiler then analyzes the code and reduces the number of vector element reverse operations to improve the run-time performance of the code.Type: GrantFiled: December 19, 2014Date of Patent: April 11, 2017Assignee: International Business Machines CorporationInventors: Michael Karl Gschwind, Jin Song Ji, Ronald Ian McIntosh, Steven J. Munroe, William J. Schmidt
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Publication number: 20160048379Abstract: An optimizing compiler includes a vector optimization mechanism that optimizes vector instructions by eliminating one or more vector element reverse operations. The compiler can generate code that includes multiple vector element reverse operations that are inserted by the compiler to account for a mismatch between the endian bias of the instruction and the endian preference indicated by the programmer or programming environment. The compiler then analyzes the code and reduces the number of vector element reverse operations to improve the run-time performance of the code.Type: ApplicationFiled: December 29, 2014Publication date: February 18, 2016Inventors: Michael Karl Gschwind, Jin Song Ji, Ronald Ian McIntosh, Steven J. Munroe, William J. Schmidt
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Publication number: 20160048445Abstract: An optimizing compiler includes a vector optimization mechanism that optimizes vector instructions by eliminating one or more vector element reverse operations. The compiler can generate code that includes multiple vector element reverse operations that are inserted by the compiler to account for a mismatch between the endian bias of the instruction and the endian preference indicated by the programmer or programming environment. The compiler then analyzes the code and reduces the number of vector element reverse operations to improve the run-time performance of the code.Type: ApplicationFiled: December 19, 2014Publication date: February 18, 2016Inventors: Michael Karl Gschwind, Jin Song Ji, Ronald Ian McIntosh, Steven J. Munroe, William J. Schmidt
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Patent number: 8832669Abstract: Generating decode time instruction optimization (DTIO) object code that enables a DTIO enabled processor to optimize execution of DTIO instructions. A code sequence configured to facilitate DTIO in a DTIO enabled processor is identified by a computer. The code sequence includes an internal representation (IR) of a first instruction and an IR of a second instruction. The second instruction is dependent on the first instruction. A schedule associated with at least one of the IR of the first instruction and the IR of the second instruction is modified. The modifying includes generating a modified schedule that is configured to place the first instruction next to the second instruction. An object file is generated based on the modified schedule. The object file includes the first instruction placed next to the second instruction. The object file is emitted.Type: GrantFiled: August 5, 2013Date of Patent: September 9, 2014Assignee: International Business Machines CorporationInventors: Robert J. Blainey, Michael K. Gschwind, James L. McInnes, Steven J. Munroe
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Patent number: 8632002Abstract: Embodiments of the invention provide a means for verifying that a person using a bank card at a point-of-sale merchant location is in fact a person authorized to use the bank card. In one embodiment of the invention, verification may involve communicating with the mobile device 103 associated with the person authorized to use the bank card. The person authorized to use the bank card may be required to send verification data to the bank card verification system via the mobile device to confirm a purchase. The bank card verification system may not authorize the purchase if the proper verification data is not received from the mobile device. In another embodiment, the bank card verification system may be configured to determine a proximity of the mobile device to the merchant point-of-sale location to verify the purchase.Type: GrantFiled: July 8, 2008Date of Patent: January 21, 2014Assignee: International Business Machines CorporationInventors: David C. Boutcher, Raymond K. Harney, Steven J. Munroe, Jeffrey J. Scheel
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Patent number: 8615745Abstract: A code sequence made up multiple instructions and specifying an offset from a base address is identified in an object file. The offset from the base address corresponds to an offset location in a memory configured for storing an address of a variable or data. The identified code sequence is configured to perform a memory reference function or a memory address computation function. It is determined that the offset location is within a specified distance of the base address and that a replacement of the identified code sequence with a replacement code sequence will not alter program semantics. The identified code sequence in the object file is replaced with the replacement code sequence that includes a no-operation (NOP) instruction or having fewer instructions than the identified code sequence. Linked executable code is generated based on the object file and the linked executable code is emitted.Type: GrantFiled: October 3, 2011Date of Patent: December 24, 2013Assignee: International Business Machines CorporationInventors: Robert J. Blainey, Michael Gschwind, James L. McInnes, Steven J. Munroe
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Patent number: 8615746Abstract: Compiling code for an enhanced application binary interface (ABI) including identifying, by a computer, a code sequence configured to perform a variable address reference table function including an access to a variable at an offset outside of a location in a variable address reference table. The code sequence includes an internal representation (IR) of a first instruction and an IR of a second instruction. The second instruction is dependent on the first instruction. A scheduler cost function associated with at least one of the IR of the first instruction and the IR of the second instruction is modified. The modifying includes generating a modified scheduler cost function that is configured to place the first instruction next to the second instruction. An object file is generated responsive to the modified scheduler cost function. The object file includes the first instruction placed next to the second instruction. The object file is emitted.Type: GrantFiled: April 30, 2012Date of Patent: December 24, 2013Assignee: International Business Machines CorporationInventors: Robert J. Blainey, Michael K. Gschwind, James L. McInnes, Steven J. Munroe
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Patent number: 8615465Abstract: Embodiments of the invention provide a means for verifying that a person using a bank card at a point-of-sale merchant location is in fact a person authorized to use the bank card. In one embodiment of the invention, verification may involve communicating with the mobile device 103 associated with the person authorized to use the bank card. The person authorized to use the bank card may be required to send verification data to the bank card verification system via the mobile device to confirm a purchase. The bank card verification system may not authorize the purchase if the proper verification data is not received from the mobile device. In another embodiment, the bank card verification system may be configured to determine a proximity of the mobile device to the merchant point-of-sale location to verify the purchase.Type: GrantFiled: July 8, 2008Date of Patent: December 24, 2013Assignee: International Business Machines CorporationInventors: David C. Boutcher, Raymond K. Harney, Steven J. Munroe, Jeffrey J. Scheel
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Patent number: 8612959Abstract: A code sequence made up multiple instructions and specifying an offset from a base address is identified in an object file. The offset from the base address corresponds to an offset location in a memory configured for storing an address of a variable or data. The identified code sequence is configured to perform a memory reference function or a memory address computation function. It is determined that the offset location is within a specified distance of the base address and that a replacement of the identified code sequence with a replacement code sequence will not alter program semantics. The identified code sequence in the object file is replaced with the replacement code sequence that includes a no-operation (NOP) instruction or having fewer instructions than the identified code sequence. Linked executable code is generated based on the object file and the linked executable code is emitted.Type: GrantFiled: October 3, 2011Date of Patent: December 17, 2013Assignee: International Business Machines CorporationInventors: Robert J. Blainey, Michael K. Gschwind, James L. McInnes, Michael R. Meissner, Steven J. Munroe
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Patent number: 8607211Abstract: A code sequence made up multiple instructions and specifying an offset from a base address is identified in an object file. The offset from the base address corresponds to an offset location in a memory configured for storing an address of a variable or data. The identified code sequence is configured to perform a memory reference function or a memory address computation function. It is determined that the offset location is within a specified distance of the base address and that a replacement of the identified code sequence with a replacement code sequence will not alter program semantics. The identified code sequence in the object file is replaced with the replacement code sequence that includes a no-operation (NOP) instruction or having fewer instructions than the identified code sequence. Linked executable code is generated based on the object file and the linked executable code is emitted.Type: GrantFiled: April 27, 2012Date of Patent: December 10, 2013Assignee: International Business Machines CorporationInventors: Robert J. Blainey, Michael K. Gschwind, James L. McInnes, Michael R. Meissner, Steven J. Munroe
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Publication number: 20130318510Abstract: Generating decode time instruction optimization (DTIO) object code that enables a DTIO enabled processor to optimize execution of DTIO instructions. A code sequence configured to facilitate DTIO in a DTIO enabled processor is identified by a computer. The code sequence includes an internal representation (IR) of a first instruction and an IR of a second instruction. The second instruction is dependent on the first instruction. A schedule associated with at least one of the IR of the first instruction and the IR of the second instruction is modified. The modifying includes generating a modified schedule that is configured to place the first instruction next to the second instruction. An object file is generated based on the modified schedule. The object file includes the first instruction placed next to the second instruction. The object file is emitted.Type: ApplicationFiled: August 5, 2013Publication date: November 28, 2013Inventors: Robert J. Blainey, Michael K. Gschwind, James L. McInnes, Steven J. Munroe
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Publication number: 20130086570Abstract: A code sequence made up multiple instructions and specifying an offset from a base address is identified in an object file. The offset from the base address corresponds to an offset location in a memory configured for storing an address of a variable or data. The identified code sequence is configured to perform a memory reference function or a memory address computation function. It is determined that the offset location is within a specified distance of the base address and that a replacement of the identified code sequence with a replacement code sequence will not alter program semantics. The identified code sequence in the object file is replaced with the replacement code sequence that includes a no-operation (NOP) instruction or having fewer instructions than the identified code sequence. Linked executable code is generated based on the object file and the linked executable code is emitted.Type: ApplicationFiled: October 3, 2011Publication date: April 4, 2013Applicant: International Business Machines CorporationInventors: Robert J. Blainey, Michael K. Gschwind, James L. McInnes, Michael R. Meissner, Steven J. Munroe
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Publication number: 20130086563Abstract: A code sequence made up multiple instructions and specifying an offset from a base address is identified in an object file. The offset from the base address corresponds to an offset location in a memory configured for storing an address of a variable or data. The identified code sequence is configured to perform a memory reference function or a memory address computation function. It is determined that the offset location is within a specified distance of the base address and that a replacement of the identified code sequence with a replacement code sequence will not alter program semantics. The identified code sequence in the object file is replaced with the replacement code sequence that includes a no-operation (NOP) instruction or having fewer instructions than the identified code sequence. Linked executable code is generated based on the object file and the linked executable code is emitted.Type: ApplicationFiled: October 3, 2011Publication date: April 4, 2013Applicant: International Business Machines CorporationInventors: Robert J. Blainey, Michael Gschwind, James L. McInnes, Steven J. Munroe
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Publication number: 20130086369Abstract: Compiling code for an enhanced application binary interface (ABI) including identifying, by a computer, a code sequence configured to perform a variable address reference table function including an access to a variable at an offset outside of a location in a variable address reference table. The code sequence includes an internal representation (IR) of a first instruction and an IR of a second instruction. The second instruction is dependent on the first instruction. A scheduler cost function associated with at least one of the IR of the first instruction and the IR of the second instruction is modified. The modifying includes generating a modified scheduler cost function that is configured to place the first instruction next to the second instruction. An object file is generated responsive to the modified scheduler cost function. The object file includes the first instruction placed next to the second instruction. The object file is emitted.Type: ApplicationFiled: April 30, 2012Publication date: April 4, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Robert J. Blainey, Michael K. Gschwind, James L. McInnes, Steven J. Munroe
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Publication number: 20130086338Abstract: A code sequence made up multiple instructions and specifying an offset from a base address is identified in an object file. The offset from the base address corresponds to an offset location in a memory configured for storing an address of a variable or data. The identified code sequence is configured to perform a memory reference function or a memory address computation function. It is determined that the offset location is within a specified distance of the base address and that a replacement of the identified code sequence with a replacement code sequence will not alter program semantics. The identified code sequence in the object file is replaced with the replacement code sequence that includes a no-operation (NOP) instruction or having fewer instructions than the identified code sequence. Linked executable code is generated based on the object file and the linked executable code is emitted.Type: ApplicationFiled: April 27, 2012Publication date: April 4, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Robert J. Blainey, Michael K. Gschwind, James L. McInnes, Michael R. Meissner, Steven J. Munroe
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Publication number: 20100006641Abstract: Embodiments of the invention provide a means for verifying that a person using a bank card at a point-of-sale merchant location is in fact a person authorized to use the bank card. In one embodiment of the invention, verification may involve communicating with the mobile device 103 associated with the person authorized to use the bank card. The person authorized to use the bank card may be required to send verification data to the bank card verification system via the mobile device to confirm a purchase. The bank card verification system may not authorize the purchase if the proper verification data is not received from the mobile device. In another embodiment, the bank card verification system may be configured to determine a proximity of the mobile device to the merchant point-of-sale location to verify the purchase.Type: ApplicationFiled: July 8, 2008Publication date: January 14, 2010Inventors: David C. Boutcher, Raymond K. Harney, Steven J. Munroe, Jeffrey J. Scheel
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Publication number: 20100006642Abstract: Embodiments of the invention provide a means for verifying that a person using a bank card at a point-of-sale merchant location is in fact a person authorized to use the bank card. In one embodiment of the invention, verification may involve communicating with the mobile device 103 associated with the person authorized to use the bank card. The person authorized to use the bank card may be required to send verification data to the bank card verification system via the mobile device to confirm a purchase. The bank card verification system may not authorize the purchase if the proper verification data is not received from the mobile device. In another embodiment, the bank card verification system may be configured to determine a proximity of the mobile device to the merchant point-of-sale location to verify the purchase.Type: ApplicationFiled: July 8, 2008Publication date: January 14, 2010Inventors: David C. Boutcher, Raymond K. Harney, Steven J. Munroe, Jeffrey J. Scheel
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Patent number: 6442753Abstract: A dependency checking apparatus and method allows checking the version of classes in an object-oriented program to assure the proper version is being used for each release of the software. According to a first preferred embodiment, classes themselves include static code that checks dependencies when the class is loaded. The first embodiment is simple to implement for classes. According to a second preferred embodiment, information relating to version checking is stored separate from the classes and is used to check dependencies. This second embodiment is more flexible, allowing the checking of interfaces as well as classes, and allows the dependency information to be altered without recompiling the classes being checked.Type: GrantFiled: August 28, 1997Date of Patent: August 27, 2002Assignee: International Business Machines CorporationInventors: Scott Neal Gerard, Steven Lester Halter, Steven J. Munroe
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Patent number: 6240466Abstract: According to the present invention, an apparatus and method for creating new objects “near” existing objects is disclosed. In a preferred embodiment of the present invention, a desirable location for the new object is determined by making a series of observations and system level decisions. By examining the system parameters and creating new objects in physical locations where other, related objects currently reside, system performance in object-oriented systems can be greatly increased.Type: GrantFiled: April 21, 1997Date of Patent: May 29, 2001Assignee: International Business Machines CorporationInventors: Michael D. McKeehan, Steven J. Munroe, Erik E. Voldal