Abstract: A charge mode open/short test circuit comprises at least two charge capacitors. A plurality of signal traces under test are connected to the test circuit first through a plurality of test tips on a test prober and then a plurality of transmission gates in a test circuit. In a load mode, reference data are loaded. In a test mode, a charge capacitor is sequentially selected and discharged into the parasitic capacitor corresponding to a sequentially selected signal trace under test for generating a charge balance signal. The signal is amplified and compared with the loaded reference data in either a digital or an analog manner. The compared pass/fail output related to the property of the signal trace is stored in a memory. In a following read mode, the stored pass/fail output is read out to an external unit for further processing.

Abstract: Automatic alignment methods for a membrane prober are disclosed. Alignment patterns are designed and manufactured on both a membrane prober and a wafer under test. The patterns are properly designed for acquiring a first set of measurement data that provide relative position information when the prober contacts the wafer. A second set of measurement data can be obtained by a controlled move between the prober and the wafer. The relative position including the translation offset and the rotation angle can be computed by the information derived from the two sets of measurement data. The second set of measurement data may also be acquired by having two alignment pattern pairs that are made to contact in a single touch. More accurate alignment can be achieved by using more pairs of alignment patterns.