Patents by Inventor Steven J. Wallace

Steven J. Wallace has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6006336
    Abstract: A real-time power conservation apparatus and method for portable computers employs a monitor to determine whether a CPU may rest based upon a real-time sampling of the CPU activity level and to activate a hardware selector to carry out the monitor's determination. If the monitor determines the CPU may rest, the hardware selector reduces CPU clock time; if the CPU is to be active, the hardware selector returns the CPU to its previous high speed clock level. Switching back into full operation from its rest state occurs without a user having to request it and without any delay in the operation of the computer while waiting for the computer to return to a "ready" state. Furthermore, the monitor adjusts the performance level of the computer to manage power conservation in response to the real-time sampling of CPU activity. Such adjustments are accomplished within the CPU cycles and do not affect the user's perception of performance and do not affect any system application software executing on the computer.
    Type: Grant
    Filed: April 12, 1993
    Date of Patent: December 21, 1999
    Assignee: Texas Instruments Incorporated
    Inventors: LaVaughn F. Watts, Jr., Steven J. Wallace
  • Patent number: 5930516
    Abstract: A real-time power conservation apparatus and method for portable computers employs a monitor to determine whether a CPU may rest based upon a real-time sampling of the CPU activity level and to activate a hardware selector to carry out the monitor's determination. If the monitor determines the CPU may rest, the hardware selector reduces CPU clock time; if the CPU is to be active, the hardware selector returns the CPU to its previous high speed clock level. Switching back into full operation from its rest state occurs without a user having to request it and without any delay in the operation of the computer while waiting for the computer to return to a "ready" state. Furthermore, the monitor adjusts the performance level of the computer to manage power conservation in response to the real-time sampling of CPU activity. Such adjustments are accomplished within the CPU cycles and do not affect the user's perception of performance and do not affect any system application software executing on the computer.
    Type: Grant
    Filed: April 30, 1997
    Date of Patent: July 27, 1999
    Assignee: Texas Instruments Incorporated
    Inventors: LaVaughn F. Watts, Jr., Steven J. Wallace
  • Patent number: 5745788
    Abstract: A method of dynamically interfacing an application processor with a plurality of peripheral ports is shown, including the use of an expanded memory interface for controlling a plurality of memory components for an application processor external to the interface. The application processor is connected to the expanded memory interface, which is in turn coupled to at least one status port to facilitate communication between the application processor and the status port.
    Type: Grant
    Filed: June 26, 1995
    Date of Patent: April 28, 1998
    Assignee: Texas Instruments Incorporated
    Inventors: Steven J. Wallace, LaVaughn Ferguson Watts, Jr.
  • Patent number: 5317707
    Abstract: An expanded memory interface is shown including an expanded memory controller for controlling a plurality of memory components for an application processor external to the interface. The application processor is connected to the expanded memory controller, which is in turn coupled to at least one status port for communication between the application processor and an external processor. At least one of the status ports are coupled to the external processor which uses such status port as an interrupt register for indicating status changes to the application processor.
    Type: Grant
    Filed: October 20, 1989
    Date of Patent: May 31, 1994
    Assignee: Texas Instruments Incorporated
    Inventors: Steven J. Wallace, LaVaughn F. Watts
  • Patent number: 5218704
    Abstract: A real-time power conservation apparatus and method for portable computers employs a monitor to determine whether a CPU may rest based upon a real-time sampling of the CPU activity level and to activate a hardware selector to carry out the monitor's determination. If the monitor determines the CPU may rest, the hardware selector reduces CPU clock time; if the CPU is to be active, the hardware selector returns the CPU to its previous high speed clock level. Switching back into full operation from its rest state occurs without a user having to request it and without any delay in the operation of the computer while waiting for the computer to return to a "ready" state. Furthermore, the monitor adjusts the performance level of the computer to manage power conservation in response to the real-time sampling of CPU activity. Such adjustments are accomplished within the CPU cycles and do not affect the user's perception of performance and do not affect any system application software executing on the computer.
    Type: Grant
    Filed: October 30, 1989
    Date of Patent: June 8, 1993
    Assignee: Texas Instruments
    Inventors: LaVaughn F. Watts, Jr., Steven J. Wallace
  • Patent number: 4949664
    Abstract: An elongated tape for marking underground lines having a cross-woven scrim formed by a first plurality of elongated plastic fibers disposed parallel to the axis of elongation of the tape and a second plurality of elongated fibers disposed normal to the fibers of the first plurality. Preferably, the tensile strength of the second plurality of fibers exceeding the tensile strength of the first plurality of fibers. The scrim is coated with a layer of plastic to form a surface, and a sign is disposed on the surface. If the tape while buried encounters a digger, it tends to break transversely rather than along the axis of elongation leaving the sign legible. In one embodiment, a layer of electrically conducting foil is disposed on one side of the scrim.
    Type: Grant
    Filed: January 3, 1989
    Date of Patent: August 21, 1990
    Assignee: Thor Enterprises, Inc.
    Inventor: Steven J. Wallace
  • Patent number: 4594501
    Abstract: An electronic thermal printer has a thermal printhead to which is applied a train of pulses which is pulse width modulated. A power switch connects and disconnects the printhead from a DC power source. The pulse train is integrated, scaled and applied as an input to a comparator circuit. The thermal printhead has a temperature sensing diode whose output is applied, as a reference voltage, to the other input of the comparator. During a print cycle, the output of the temperature sensing diode is cut off and the reference voltage is capacitively stored and held as the reference voltage. The output of the comparator circuit clears a latch circuit whose input is provided by a system clock and whose output is connected to control the power switch. The comparator provides an output when the integrated voltage reaches the reference voltage, clearing the latch. Since the latch is supplied with signals from the system clock, a constant frequency is maintained.
    Type: Grant
    Filed: October 9, 1980
    Date of Patent: June 10, 1986
    Assignee: Texas Instruments Incorporated
    Inventors: Paul R. Culley, Steven J. Wallace
  • Patent number: 4420717
    Abstract: A stepper motor for use in peripheral devices such as electronic printing terminals has its coils selected for activation by selection circuitry, with its power provided by a switch mode current regulator. The switch mode regulator utilizes the selected motor winding as the storage element of the regulator and the voltage ramp derived from the current flow through the motor coil itself for comparison with a reference voltage. The output of the comparator circuit controls the state of a latch which has a fixed frequency clock input. The frequency of the latch output is fixed, but the on time and off time of the latch varies in accordance with the output of the comparator. A comparator and latch circuit therefore form a pulse width modulator which then regulates the on and off time of the switching regulator power transistor.
    Type: Grant
    Filed: October 6, 1980
    Date of Patent: December 13, 1983
    Assignee: Texas Instruments Incorporated
    Inventors: Steven J. Wallace, Paul L. Culley