Patents by Inventor Steven John Clohset

Steven John Clohset has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9595074
    Abstract: Aspects include a multistage collector to receive outputs from plural processing elements. Processing elements may comprise (each or collectively) a plurality of clusters, with one or more ALUs that may perform SIMD operations on a data vector and produce outputs according to the instruction stream being used to configure the ALU(s). The multistage collector includes substituent components each with at least one input queue, a memory, a packing unit, and an output queue; these components can be sized to process groups of input elements of a given size, and can have multiple input queues and a single output queue. Some components couple to receive outputs from the ALUs and others receive outputs from other components. Ultimately, the multistage collector can output groupings of input elements. Each grouping of elements (e.g., at input queues, or stored in the memories of component) can be formed based on matching of index elements.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: March 14, 2017
    Assignee: Imagination Technologies Limited
    Inventors: James Alexander McCombe, Steven John Clohset, Jason Rupert Redgrave, Luke Tilman Peterson
  • Publication number: 20160350154
    Abstract: In some aspects, finer grained parallelism is achieved by segmenting programmatic workloads into smaller discretized portions, where a first element can be indicative both of a configuration or program to be executed, and a first data set to be used in such execution, while a second element can be indicative of a second data element or group. The discretized portions can cause program execute on distributed processors. Approaches to selecting processors, and allocating local memory associated with those processors are disclosed. In one example, discretized portions that share a program have an anti-affinity to cause dispersion, for initial execution assignment. Flags, such as programmer and compiler generated flags can be used in determining such allocations. Workloads can be grouped according to compatibility of memory usage requirements.
    Type: Application
    Filed: August 12, 2016
    Publication date: December 1, 2016
    Inventors: Steven John Clohset, James Alexander McCombe, Luke Tilman Peterson
  • Patent number: 9407578
    Abstract: Aspects relate to arbitrating access to an interconnect among multiple ports. For example, input ports receive requests for access to identified destination ports and buffer these in one or more FIFOs. A picker associated with respective FIFO(s) begins an empty arbitration packet that includes a location for each output port and fills one or more locations in the packet, such as based on a prioritization scheme. Each packet is passed in a ring to another picker, which performs a fill that does not conflict with previously filled locations in that packet. Each picker has an opportunity to place requests in each of the packets. Results of the arbitration are dispatched to reorder buffers associated with respective output ports and used to schedule the interconnect. Each arbitration cycle thus produces a set of control information for an interconnect to be used in subsequent data transfer steps.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: August 2, 2016
    Assignee: Imagination Technologies Limited
    Inventors: Joseph M. Richards, Jason Rupert Redgrave, Steven John Clohset
  • Publication number: 20150242990
    Abstract: Aspects can be for ray tracing of 3-D scenes, and include dynamically controlling a population of rays being stored in a memory, to keep the population within a target, a memory footprint or other resource usage specification. An example includes controlling the population by examining indicia associated with rays returning from intersection testing, to be shaded, the indicia correlated with behavior of shaders to be run for those rays, such that population control selects, or reorders rays for shading, to prioritize shading of rays whose shaders are expected to produce fewer rays.
    Type: Application
    Filed: May 12, 2015
    Publication date: August 27, 2015
    Inventors: Luke Tilman Peterson, Ryan R. Salsbury, Sean Matthew Gies, Steven John Clohset
  • Patent number: 9030476
    Abstract: Aspects can be for ray tracing of 3-D scenes, and include dynamically controlling a population of rays being stored in a memory, to keep the population within a target, a memory footprint or other resource usage specification. An example includes controlling the population by examining indicia associated with rays returning from intersection testing, to be shaded, the indicia correlated with behavior of shaders to be run for those rays, such that population control selects, or reorders rays for shading, to prioritize shading of rays whose shaders are expected to produce fewer rays.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: May 12, 2015
    Assignee: Imagination Technologies, Limited
    Inventors: Luke Tilman Peterson, Ryan R. Salsbury, Sean Matthew Gies, Steven John Clohset
  • Publication number: 20140306959
    Abstract: Aspects relate to tracing rays in 3-D scenes that comprise objects that are defined by or with implicit geometry. In an example, a trapping element defines a portion of 3-D space in which implicit geometry exist. When a ray is found to intersect a trapping element, a trapping element procedure is executed. The trapping element procedure may comprise marching a ray through a 3-D volume and evaluating a function that defines the implicit geometry for each current 3-D position of the ray. An intersection detected with the implicit geometry may be found concurrently with intersections for the same ray with explicitly-defined geometry, and data describing these intersections may be stored with the ray and resolved.
    Type: Application
    Filed: March 10, 2014
    Publication date: October 16, 2014
    Applicant: Imagination Technologies, Ltd.
    Inventors: Cuneyt OZDAS, Luke Tilman PETERSON, Steven BLACKMON, Steven John CLOHSET
  • Publication number: 20140269760
    Abstract: Aspects relate to arbitrating access to an interconnect among multiple ports. For example, input ports receive requests for access to identified destination ports and buffer these in one or more FIFOs. A picker associated with respective FIFO(s) begins an empty arbitration packet that includes a location for each output port and fills one or more locations in the packet, such as based on a prioritization scheme. Each packet is passed in a ring to another picker, which performs a fill that does not conflict with previously filled locations in that packet. Each picker has an opportunity to place requests in each of the packets. Results of the arbitration are dispatched to reorder buffers associated with respective output ports and used to schedule the interconnect. Each arbitration cycle thus produces a set of control information for an interconnect to be used in subsequent data transfer steps.
    Type: Application
    Filed: March 12, 2013
    Publication date: September 18, 2014
    Applicant: CAUSTIC GRAPHICS, INC.
    Inventors: Joseph M. Richards, Jason Rupert Redgrave, Steven John Clohset
  • Patent number: 8692834
    Abstract: In some aspects, systems and methods provide for forming groupings of a plurality of independently-specified computation workloads, such as graphics processing workloads, and in a specific example, ray tracing workloads. The workloads include a scheduling key, which is one basis on which the groupings can be formed. Workloads grouped together can all execute from the same source of instructions, one or more different private data elements. Such workloads can recursively instantiate other workloads that reference the same private data elements. In some examples, the scheduling key can be used to identify a data element to be used by all the workloads of a grouping. Memory conflicts to private data elements are handled through scheduling of non-conflicted workloads or specific instructions an deferring conflicted workloads instead of locking memory locations.
    Type: Grant
    Filed: August 6, 2012
    Date of Patent: April 8, 2014
    Assignee: Caustic Graphics, Inc.
    Inventors: Luke Tilman Peterson, James Alexander McCombe, Steven John Clohset, Jason Rupert Redgrave
  • Patent number: 8674987
    Abstract: Aspects can be for ray tracing of 3-D scenes, and include dynamically controlling a population of rays being stored in a memory, to keep the population within a target, a memory footprint or other resource usage specification. An example includes controlling the population by examining indicia associated with rays returning from intersection testing, to be shaded, the indicia correlated with behavior of shaders to be run for those rays, such that population control selects, or reorders rays for shading, to prioritize shading of rays whose shaders are expected to produce fewer rays. The indicia can include a respective weight for each ray. In an example, analyzer modules examine hints associated with shaders bound to intersected primitives. Population control aspects can influence ray diversity in memory, including encouraging a varying diversity pattern as rendering of a given scene or frame progresses, based on system resource indicia, rendering metrics and so on.
    Type: Grant
    Filed: April 30, 2010
    Date of Patent: March 18, 2014
    Assignee: Caustic Graphics, Inc.
    Inventors: Luke Tilman Peterson, Ryan R. Salsbury, Sean Matthew Gies, Steven John Clohset
  • Publication number: 20130069960
    Abstract: Aspects include a multistage collector to receive outputs from plural processing elements. Processing elements may comprise (each or collectively) a plurality of clusters, with one or more ALUs that may perform SIMD operations on a data vector and produce outputs according to the instruction stream being used to configure the ALU(s). The multistage collector includes substituent components each with at least one input queue, a memory, a packing unit, and an output queue; these components can be sized to process groups of input elements of a given size, and can have multiple input queues and a single output queue. Some components couple to receive outputs from the ALUs and others receive outputs from other components. Ultimately, the multistage collector can output groupings of input elements. Each grouping of elements (e.g., at input queues, or stored in the memories of component) can be formed based on matching of index elements.
    Type: Application
    Filed: September 12, 2012
    Publication date: March 21, 2013
    Inventors: James Alexander McCombe, Steven John Clohset, Jason Rupert Redgrave, Luke Tilman Peterson
  • Publication number: 20130002672
    Abstract: Aspects comprise systems implementing 3-D graphics processing functionality in a multiprocessing system. Control flow structures are used in scheduling instances of computation in the multiprocessing system, where different points in the control flow structure serve as points where deferral of some instances of computation can be performed in favor of scheduling other instances of computation. In some examples, the control flow structure identifies particular tasks, such as intersection testing of a particular portion of an acceleration structure, and a particular element of shading code. In some examples, the aspects are used in 3-D graphics processing systems that can perform ray tracing based rendering.
    Type: Application
    Filed: September 11, 2012
    Publication date: January 3, 2013
    Inventors: Luke Tilman Peterson, James Alexander McCombe, Ryan R. Salsbury, Steven John Clohset
  • Patent number: 8300049
    Abstract: Aspects comprise systems implementing 3-D graphics processing functionality in a multiprocessing system. Control flow structures are used in scheduling instances of computation in the multiprocessing system, where different points in the control flow structure serve as points where deferral of some instances of computation can be performed in favor of scheduling other instances of computation. In some examples, the control flow structure identifies particular tasks, such as intersection testing of a particular portion of an acceleration structure, and a particular element of shading code. In some examples, the aspects are used in 3-D graphics processing systems that can perform ray tracing based rendering.
    Type: Grant
    Filed: September 9, 2011
    Date of Patent: October 30, 2012
    Assignee: Caustic Graphics, Inc.
    Inventors: Luke Tilman Peterson, James Alexander McCombe, Ryan R. Salsbury, Steven John Clohset
  • Publication number: 20120001912
    Abstract: Aspects comprise systems implementing 3-D graphics processing functionality in a multiprocessing system. Control flow structures are used in scheduling instances of computation in the multiporcessing system, where different points in the control flow structure serve as points where deferral of some instances of computation can be performed in favor of scheduling other instances of computation. In some examples, the control flow structure identifies particular tasks, such as intersection testing of a particular portion of an acceleration structure, and a particular element of shading code. In some examples, the aspects are used in 3-D graphics processing systems that can perform ray tracing based rendering.
    Type: Application
    Filed: September 9, 2011
    Publication date: January 5, 2012
    Applicant: Caustic Graphics, Inc.
    Inventors: Luke Tilman PETERSON, James Alexander McCOMBE, Ryan R. SALSBURY, Steven John CLOHSET
  • Patent number: 8018457
    Abstract: Aspects comprise systems implementing ray tracing functionality according to example architectures. In one example, rays are collected into collections against elements of an acceleration structure, which in some cases are associated with objects composing a scene being ray traced. Indications of detected ray intersections also can be collected in an output buffer, and in some examples, the output buffer can comprise a plurality of portions, each associated with a scene object, or a common portion of code to be executed during shading. Buffer contents can be accessed in a block read. An intersection shading resource can load data to be used in shading the intersections for the identified rays, and locally storing that data for use in shading those intersections.
    Type: Grant
    Filed: September 8, 2009
    Date of Patent: September 13, 2011
    Assignee: Caustic Graphics, Inc.
    Inventors: Luke Tilman Peterson, James Alexander McCombe, Ryan R. Salsbury, Steven John Clohset
  • Publication number: 20110032257
    Abstract: Aspects can be for ray tracing of 3-D scenes, and include dynamically controlling a population of rays being stored in a memory, to keep the population within a target, a memory footprint or other resource usage specification. An example includes controlling the population by examining indicia associated with rays returning from intersection testing, to be shaded, the indicia correlated with behavior of shaders to be run for those rays, such that population control selects, or reorders rays for shading, to prioritize shading of rays whose shaders are expected to produce fewer rays. The indicia can include a respective weight for each ray. In an example, analyzer modules examine hints associated with shaders bound to intersected primitives. Population control aspects can influence ray diversity in memory, including encouraging a varying diversity pattern as rendering of a given scene or frame progresses, based on system resource indicia, rendering metrics and so on.
    Type: Application
    Filed: April 30, 2010
    Publication date: February 10, 2011
    Applicant: Caustic Graphics, Inc.
    Inventors: Luke Tilman Peterson, Ryan R. Salsbury, Sean Matthew Gies, Steven John Clohset
  • Publication number: 20090322752
    Abstract: Aspects comprise systems implementing ray tracing functionality according to example architectures. In one example, rays are collected into collections against elements of an acceleration structure, which in some cases are associated with objects composing a scene being ray traced. Indications of detected ray intersections also can be collected in an output buffer, and in some examples, the output buffer can comprise a plurality of portions, each associated with a scene object, or a common portion of code to be executed during shading. Buffer contents can be accessed in a block read. An intersection shading resource can load data to be used in shading the intersections for the identified rays, and locally storing that data for use in shading those intersections.
    Type: Application
    Filed: September 8, 2009
    Publication date: December 31, 2009
    Applicant: Caustic Graphics, Inc.
    Inventors: Luke Tilman Peterson, James Alexander McCombe, Ryan R. Salsbury, Steven John Clohset