Patents by Inventor Steven K. Sherman

Steven K. Sherman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5353433
    Abstract: A method and apparatus for analyzing signal timing requirements in complex electronic systems. The invention accepts from the user a set of specifications that express timing constraints, and generates therefrom a set of self-consistent "dependences" that relate signal locations to one another in terms of the minimum or maximum time that must elapse between such locations. The invention also generates signal pattern information that establishes the states of the various signals involved at different relevant times, and can be used to produce a signal profile.
    Type: Grant
    Filed: September 6, 1990
    Date of Patent: October 4, 1994
    Assignee: Digital Equipment Corporation
    Inventor: Steven K. Sherman
  • Patent number: 5239493
    Abstract: A method and apparatus for converting unstructured descriptions of signal timing constraints, which can be entered by a user in a natural-language format, into unambiguous symbolic specification descriptions. The invention also generates file structures containing both the signal characteristics entered by the user and timing-constraint information that may be derived therefrom.
    Type: Grant
    Filed: June 26, 1990
    Date of Patent: August 24, 1993
    Assignee: Digital Equipment Corporation
    Inventor: Steven K. Sherman
  • Patent number: 5212783
    Abstract: Method and means for storing and analyzing timing information for electronic components and systems. Timing intervals and state transitions are represented as the edges and vertices, respectively, of a graph. Timing inconsistencies are detected where graph edges form a closed loop, and the sum of the values of the edges around the loop (taking account of path direction and interval signs) is non-zero. After identifying timing inconsistencies, the invention indicates which, if any, timing dependences are eligible for adjustment to bring the edge sum to zero and thereby alleviate the inconsistency.
    Type: Grant
    Filed: June 13, 1988
    Date of Patent: May 18, 1993
    Assignee: Digital Equipment Corporation
    Inventor: Steven K. Sherman
  • Patent number: 4965758
    Abstract: An aid for design analysis of timing requirements of a computer operation by operating a computer system and identifying an optimized reduced set of requirements which is self consistent and which is minimally reduced from the original.
    Type: Grant
    Filed: March 1, 1988
    Date of Patent: October 23, 1990
    Assignee: Digital Equipment Corporation
    Inventor: Steven K. Sherman