Patents by Inventor Steven Klein
Steven Klein has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11972095Abstract: Various embodiments discussed herein enable client applications to be heavily integrated with a voice assistant in order to perform commands associated with voice utterances of users via voice assistant functionality and also seamlessly cause client applications to automatically perform native functions as part of executing the voice utterance. Such heavy integration also allows particular embodiments to support multi-modal input from a user for a single conversational interaction. In this way, client application user interface interactions, such as clicks, touch gestures, or text inputs are executed alternative or in addition to the voice utterances.Type: GrantFiled: October 22, 2021Date of Patent: April 30, 2024Assignee: Microsoft Technology Licensing, LLCInventors: Tudor Buzasu Klein, Viktoriya Taranov, Sergiy Gavrylenko, Jaclyn Carley Knapp, Andrew Paul McGovern, Harris Syed, Chad Steven Estes, Jesse Daniel Eskes Rusak, David Ernesto Heekin Burkett, Allison Anne O'Mahony, Ashok Kuppusamy, Jonathan Reed Harris, Jose Miguel Rady Allende, Diego Hernan Carlomagno, Talon Edward Ireland, Michael Francis Palermiti, II, Richard Leigh Mains, Jayant Krishnamurthy
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Publication number: 20240113479Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed for socket interconnect structures and related methods. An example socket interconnect apparatus includes a housing defining a plurality of first openings and a plurality of second openings and a ground structure coupled to the housing. The ground structure defines a plurality of third openings. The third openings of the ground structure align with the second openings of the housing when the ground structure is coupled to the housing. A plurality of ground pins are located in respective ones of the second openings and third openings. The ground structure is to electrically couple the ground pins. A plurality of signal pins are located in respective ones of the first openings of the housing. The signal pins are electrically isolated from the ground structure.Type: ApplicationFiled: September 30, 2022Publication date: April 4, 2024Inventors: Kai Xiao, Phil Geng, Carlos Alberto Lizalde Moreno, Raul Enriquez Shibayama, Steven A. Klein
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Patent number: 11916322Abstract: Techniques and mechanisms for coupling packaged devices with a dual-sided socket device. In an embodiment, two interfaces of the socket device comprise, respectively, first metallization structures and second metallization structures on opposite sides of a socket body structure. The first metallization structures each form a respective corrugation structure to electrically couple with a corresponding conductive contact of a first packaged device. The corrugation structures facilitate such electrical coupling each via a vertical wipe of the corresponding conductive contact. In another embodiment, a pitch of the first metallization structures is in a range of between 0.1 millimeters (mm) and 2 mm. One such metallization structure has a vertical span in a range of between 0.05 mm and 2.0 mm, where a portion of a side of the metallization structure forms a corrugation structure, and has a horizontal span which is at least 5% of the vertical span.Type: GrantFiled: September 25, 2020Date of Patent: February 27, 2024Assignee: Intel CorporationInventors: Srikant Nekkanty, Steven Klein, Feroz Mohammad
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Patent number: 11916003Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises a first substrate; a second substrate; and an array of interconnects electrically coupling the first substrate to the second substrate. In an embodiment, the array of interconnects comprises first interconnects, wherein the first interconnects have a first volume and a first material composition, and second interconnects, wherein the second interconnects have a second volume and a second material composition, and wherein the first volume is different than the second volume and/or the first material composition is different than the second material composition.Type: GrantFiled: September 18, 2019Date of Patent: February 27, 2024Assignee: Intel CorporationInventors: Xiao Lu, Jiongxin Lu, Christopher Combs, Alexander Huettis, John Harper, Jieping Zhang, Nachiket R. Raravikar, Pramod Malatkar, Steven A. Klein, Carl Deppisch, Mohit Sood
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Patent number: 11818832Abstract: Embodiments disclosed herein include assemblies. In an embodiment, an assembly comprises a socket and a bolster plate on a board, where the bolster plate has load studs and an opening that surrounds the socket; a shim having first and second ends; and a carrier on the bolster plate, where the carrier has an opening and cutouts. The shim may have an opening through the first end as the second end is affixed to the carrier. The opening of the shim entirely over one cutout from a corner region of the carrier. In an embodiment, the assembly comprises an electronic package in the opening of the carrier, where the electronic package is affixed to the carrier, and a heatsink over the electronic package and carrier, where the first end is directly coupled to a surface of the heatsink and a surface of one load stud of the bolster plate.Type: GrantFiled: March 24, 2020Date of Patent: November 14, 2023Assignee: Intel CorporationInventors: Feroz Mohammad, Ralph V. Miele, Thomas Boyd, Steven A. Klein, Gregorio R. Murtagian, Eric W. Buddrius, Daniel Neumann, Rolf Laido
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Patent number: 11789019Abstract: The present application discloses proteins or peptides and methods of using such proteins or peptides to evaluate the immune status of a patient. In one embodiment, proteins or peptides may be used to detect endogenous calnexin specific CD4 T cells. In one preferred embodiment, the proteins or peptides may comprise peptide-MHCII tetramers (pMHC tetramers).Type: GrantFiled: August 1, 2019Date of Patent: October 17, 2023Assignee: WISCONSIN ALUMNI RESEARCH FOUNDATIONInventors: Bruce Steven Klein, Marcel Wuethrich
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Patent number: 11646244Abstract: A microprocessor mounting apparatus comprising a microprocessor socket on a printed circuit board (PCB) and a bolster plate surrounding a perimeter of the microprocessor socket. The bolster plate has a first surface adjacent to the PCB, and a second surface opposite the first surface. A heat dissipation device is on the second surface of the bolster plate. The heat dissipation interface is thermally coupled to the microprocessor socket.Type: GrantFiled: June 27, 2019Date of Patent: May 9, 2023Assignee: Intel CorporationInventors: Steven A. Klein, Zhimin Wan, Chia-Pin Chiu, Shankar Devasenathipathy
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Patent number: 11581671Abstract: An integrated circuit (IC) socket comprising a housing with a land side, an opposing die side, and sidewalls around a perimeter of the housing. The housing comprises a first dielectric. A plurality of socket pins extends from the land side of the housing through socket pin holes in the housing over the die side of the housing. A second dielectric is within the interstitial regions between the socket pins and sidewalls of the socket pin holes. A frame structure extends around at least a portion of the perimeter of the housing, and a mesh structure is embedded within the first dielectric. The mesh structure has plurality of mesh filaments extending between the plurality of socket pin holes and coupled to the frame structure.Type: GrantFiled: March 22, 2019Date of Patent: February 14, 2023Assignee: Intel CorporationInventors: Zhimin Wan, Steven A. Klein, Chia-Pin Chiu, Shankar Devasenathipathy
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Patent number: 11569596Abstract: Systems, apparatus, and/or processes directed to applying pressure to a socket to alter a shape of the socket to improve a connection between the socket and a substrate, printed circuit board, or other component. The socket may receive one or more chips, may be an interconnect, or may be some other structure that is part of a package. The shape of the socket may be flattened so that a side of the socket may form a high-quality physical and electrical coupling with the substrate.Type: GrantFiled: March 27, 2020Date of Patent: January 31, 2023Assignee: Intel CorporationInventors: Steven A. Klein, Kuang Liu, Srikant Nekkanty, Feroz Mohammad, Donald Tiendung Tran, Srinivasa Aravamudhan, Hemant Mahesh Shah, Alexander W. Huettis
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Publication number: 20220407254Abstract: A microelectronic socket structure and a method of forming the same. The socket structure comprises: a socket structure housing defining a cavity therein; and an interconnection structure including: a contact element disposed at least in part within the cavity, and configured to be electrically coupled to a corresponding microelectronic package, the contact element corresponding to one of a signal contact element or a ground contact element; and a conductive structure disposed at least in part within the cavity, electrically coupled to the contact element, and having an outer contour that is non-conformal with respect to an outer contour of the contact element.Type: ApplicationFiled: June 18, 2021Publication date: December 22, 2022Applicant: Intel CorporationInventors: Zhichao Zhang, Zhe Chen, Steven A. Klein, Feifei Cheng, Srikant Nekkanty, Kemal Aygun, Michael E. Ryan, Pooya Tadayon
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Patent number: 11481118Abstract: The present disclosure describes apparatuses and methods for storage media programming with adaptive write buffer release. In some aspects, a media write manager of a storage media system stores, to a write buffer, data received from a host interface. The media write manager determines parity information for the data stored to the write buffer and then releases the write buffer on completion of determining the parity information for the data. The media write manager may then write at least a portion of the data to storage media after the write buffer is released. By releasing the write buffer of the storage media system after determining the parity information, the write buffer is freed more quickly, which may result in improved write buffer utilization and increased write throughput of the storage media system.Type: GrantFiled: January 8, 2020Date of Patent: October 25, 2022Assignee: Marvell Asia PTE, Ltd.Inventors: Steven A. Klein, Viet-Dzung Nguyen, Gregory Burd
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Patent number: 11414122Abstract: According to one or more embodiments, a steer by wire steering system includes a handwheel actuator, a roadwheel actuator, and a resynchronization module to dynamically adjust handwheel position that is used for rack position reference calculation. The dynamic adjustment includes determining a desynchronization amount based on a difference in an actual handwheel position and a synchronized handwheel position. The dynamic adjustment further includes computing a handwheel adjustment using the desynchronization amount, a vehicle speed, and a handwheel speed. The dynamic adjustment further includes computing an adjusted handwheel position based on the handwheel adjustment and the actual handwheel position. The dynamic adjustment further includes updating the reference rack position based on the adjusted handwheel position. The dynamic adjustment is continuously repeated until the handwheel adjustment is substantially equal to zero.Type: GrantFiled: March 1, 2019Date of Patent: August 16, 2022Assignee: Steering Solutions IP Holding CorporationInventors: Kai Zheng, Steven Klein, Mariam Swetha George, Scott T. Sanford
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Publication number: 20220102892Abstract: Techniques and mechanisms for coupling packaged devices with a socket device. In an embodiment, the socket device comprises a socket body structure and conductors extending therethrough. A pitch of the conductors is in a range of between 0.1 millimeters (mm) and 3 mm. First and second metallization structures also extend, respectively, from opposite respective sides of the socket body structure. In the socket body structure, a conductive shield structure, electrically coupled to the first and second metallization structures, substantially extends around one of the conductors. For each of the first and second metallization structures, a vertical span of the metallization structure is in a range of between 0.05 mm and 2.0 mm, a portion of a side of the metallization structure forms a respective corrugation structure, and a horizontal span of the portion is at least 5% of the vertical span of the metallization structure.Type: ApplicationFiled: September 25, 2020Publication date: March 31, 2022Applicant: Intel CorporationInventors: Srikant Nekkanty, Steven Klein, Feroz Mohammad, Joe Walczyk, Kuang Liu, Zhichao Zhang
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Publication number: 20220102887Abstract: Embodiments disclosed herein include sockets and electronic packages with socket architectures. In an embodiment, a socket comprises a housing with a first surface and a second surface. In an embodiment, a plurality of interconnect pins pass through the housing. In an embodiment, an alignment hole is provided through the housing. In an embodiment, an alignment post extending out from the first surface of the housing is also provided.Type: ApplicationFiled: September 25, 2020Publication date: March 31, 2022Inventors: Feifei CHENG, Thomas BOYD, Kuang LIU, Steven A. KLEIN, Daniel NEUMANN, Mohanraj PRABHUGOUD
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Publication number: 20220102883Abstract: Techniques and mechanisms for coupling packaged devices with a dual-sided socket device. In an embodiment, two interfaces of the socket device comprise, respectively, first metallization structures and second metallization structures on opposite sides of a socket body structure. The first metallization structures each form a respective corrugation structure to electrically couple with a corresponding conductive contact of a first packaged device. The corrugation structures facilitate such electrical coupling each via a vertical wipe of the corresponding conductive contact. In another embodiment, a pitch of the first metallization structures is in a range of between 0.1 millimeters (mm) and 2 mm. One such metallization structure has a vertical span in a range of between 0.05 mm and 2.0 mm, where a portion of a side of the metallization structure forms a corrugation structure, and has a horizontal span which is at least 5% of the vertical span.Type: ApplicationFiled: September 25, 2020Publication date: March 31, 2022Applicant: Intel CorporationInventors: Srikant Nekkanty, Steven Klein, Feroz Mohammad
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Publication number: 20220069532Abstract: An integrated circuit assembly may be formed comprising an electronic socket having at least one conductive pin, wherein a portion of the conductive pin extends from the electronic socket. The integrated circuit assembly further comprises a conductive interposer including at least one conductive via having a conductive layer on a sidewall thereof. The conductive interposer is abutted against the electronic socket, such that the at least one conductive pin is inserted into the at least one conductive via and is biased against the conductive layer of the at least one conductive via. In further embodiments, an integrated circuit package may be electrically attached to the conductive interposer.Type: ApplicationFiled: September 1, 2020Publication date: March 3, 2022Applicant: Intel CorporationInventors: Feroz Mohammad, Steven Klein, Srikant Nekkanty
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Publication number: 20210307153Abstract: Embodiments disclosed herein include assemblies. In an embodiment, an assembly comprises a socket and a bolster plate on a board, where the bolster plate has load studs and an opening that surrounds the socket; a shim having first and second ends; and a carrier on the bolster plate, where the carrier has an opening and cutouts. The shim may have an opening through the first end as the second end is affixed to the carrier. The opening of the shim entirely over one cutout from a corner region of the carrier. In an embodiment, the assembly comprises an electronic package in the opening of the carrier, where the electronic package is affixed to the carrier, and a heatsink over the electronic package and carrier, where the first end is directly coupled to a surface of the heatsink and a surface of one load stud of the bolster plate.Type: ApplicationFiled: March 24, 2020Publication date: September 30, 2021Inventors: Feroz MOHAMMAD, Ralph V. MIELE, Thomas BOYD, Steven A. KLEIN, Gregorio R. MURTAGIAN, Eric W. BUDDRIUS, Daniel NEUMANN, Rolf LAIDO
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Publication number: 20210305731Abstract: Systems, apparatus, and/or processes directed to applying pressure to a socket to alter a shape of the socket to improve a connection between the socket and a substrate, printed circuit board, or other component. The socket may receive one or more chips, may be an interconnect, or may be some other structure that is part of a package. The shape of the socket may be flattened so that a side of the socket may form a high-quality physical and electrical coupling with the substrate.Type: ApplicationFiled: March 27, 2020Publication date: September 30, 2021Inventors: Steven A. KLEIN, Kuang LIU, Srikant NEKKANTY, Feroz MOHAMMAD, Donald Tiendung TRAN, Srinivasa ARAVAMUDHAN, Hemant Mahesh SHAH, Alexander W. HUETTIS
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Patent number: 11094304Abstract: A mute holder for a music stand includes a mute supporting plate having a plurality of mute supporting through holes for holding mutes, a non-continuous flat bottom edge, and a curved front edge forwardly extended from the flat bottom edge; a locking mechanism having a half-circular locking ring having one end attached on the flat bottom edge of the mute supporting plate and an opposite free end pivotably rotated with respect to the flat bottom edge of the mute supporting plate to lock the free end thereon and to release from the passes supporting plate; wherein the locking mechanism further includes a locking screw passing through the half-circular locking ring and to be biased against the music stand for locking thereon.Type: GrantFiled: December 30, 2019Date of Patent: August 17, 2021Inventor: Steven Klein
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Publication number: 20210205445Abstract: A Dectin-2 ligand vaccine adjuvant and a method of making and using the Dectin-2 ligand vaccine adjuvant in a vaccine to immunize a patient are disclosed. Also discloses is a vaccine composition comprising a Bl-Eng2 antigen and methods of using the vaccine composition to immunize a subject against a fungal infection.Type: ApplicationFiled: February 26, 2021Publication date: July 8, 2021Applicant: Wisconsin Alumni Research FoundationInventors: Bruce Steven Klein, Huafeng Wang, Marcel Wuethrich, Tristan Theodore Brandhorst