Abstract: A bypass apparatus in a computer system is disclosed. The computer system includes a central storage facility for storing various instructions to be executed, an instruction register for storing an instruction being executed, and an instruction buffer, interconnected between the central storage facility and the instruction register, for temporarily storing the next instructions to be executed following execution of the instruction stored in the instruction register. A bypass path interconnects the central storage facility directly to the instruction register for bypassing the instruction buffer when certain special instructions being held in the instruction register are being executed, such as an EXECUTE instruction. Consequently, the contents of the instruction buffer are not lost or destroyed as a result of execution of the special instruction.

Abstract: A instruction fetch look-aside buffer with a loop mode control provides for reduced storage contention by storing a program loop in a look-aside buffer during normal mode operations. When the loop is to be executed again loop mode is entered and the instructions are taken directly out of the look-aside buffer without any access of storage required. If the instructions in the look-aside buffer are invalidated during loop mode or if the program loop is exited normal mode operations are resumed.

Abstract: A high speed multiplier unit for multiplying both fixed point and floating point operands is disclosed and claimed. This multiplier unit is a system level functional unit which allows floating point and fixed point operations to be performed directly. In addition to multiplication, the multiplier unit performs exponent calculation, post-normalization, and error detection. The multiplier unit also provides for overlapped loading of operands.