Abstract: A mechanism for broadcasting instructions/data to a plurality of processors in a multiprocessor device via aliasing is provided. In order to broadcast data to a plurality of processors, a control processor writes to the registers that store the identifiers of the processors and sets two or more of these registers to a same value. The control processor may write the desired data/instructions to be broadcast to a portion of memory corresponding to the starting address associated with the processor identifier of the two or more processors. When the two or more processors look for a starting address of their local store from which to read, the two or more processors will identify the same starting address, essentially aliasing the memory region. The two or more processors will read the instructions/data from the same aliased memory region starting at the identified starting address and process the same instructions/data.

Abstract: One of the processors of a multiprocessor system is chosen to be a boot processor. The other processors of the multiprocessor system execute masking code that generates electromagnetic and/or thermal signatures that mask the electromagnetic and/or thermal signatures of the actual boot processor. Such masking may involve running the same boot code as the boot processor but without obtaining access to security information, such as the security key for accessing the system. The electromagnetic and/or thermal signatures generated by the execution of the masking code preferably approximate the electromagnetic and/or thermal signatures of the actual boot code executing on the boot processor. In this way, it is difficult to distinguish which processor is the actual boot processor.

Abstract: The claimed subject matter comprises a technology to scan a document for file attachments, generate alternative file names corresponding to a particular attachment, determine whether or not the particular file attachment is the latest version of a file or has a name and/or file path that could be confused with the name and/or path of another file. In the event one of the above conditions are met, the technology provides the means for a user to verify that the file attachment is the desired file and, if necessary, to select an alternative file for attachment.

Abstract: Masking a boot sequence by providing a dummy processor is provided. One of the processors of a multiprocessor system is chosen to be a boot processor. The other processors of the multiprocessor system execute masking code that generates electromagnetic and/or thermal signatures that mask the electromagnetic and/or thermal signatures of the actual boot processor. The execution of the masking code on the non-boot processors preferably generates electromagnetic and/or thermal signatures that approximate the signatures of the actual boot code execution on the boot processor. One of the non-boot processors is selected to execute masking code that is different from the other masking code sequence to thereby generate an electromagnetic and/or thermal signature that appears to be unique from an external monitoring perspective.

Abstract: A mechanism is provided for masking a boot sequence by providing a dummy processor. With the mechanism, one of the processors of a multiprocessor system is chosen to be a boot processor. The other processors of the multiprocessor system execute masking code that generates electromagnetic and/or thermal signatures that mask the electromagnetic and/or thermal signatures of the actual boot processor. The execution of the masking code on the non-boot processors preferably generates electromagnetic and/or thermal signatures that approximate the signatures of the actual boot code execution on the boot processor. One of the non-boot processors is selected to execute masking code that is different from the other masking code sequence to thereby generate a electromagnetic and/or thermal signature that appears to be unique from an external monitoring perspective.

Abstract: A cache replacement system for extending the debugging capabilities of accelerated simulation by enabling enhanced cache data and state checking is provided. The system includes a Cell Broadband Engine Architecture (CBEA) compliant system implementing Replacement Management Tables in an accelerated simulation environment. The RMTs control cache replacement and allow the software to direct entries with specific address ranges at a particular subset of the cache. The RMTs further allow for locking data in the cache and are utilized to prevent overwriting data in the cache by directing data that is known to be used only once at a particular set. Using the locking mechanism in an accelerated simulation environment, a user is able to run code sets, which, when the microprocessor system being tested is correctly designed, generates identical and verifiable data and cache states in each of the different sets of the cache.

Abstract: A method to enable improved analysis and use of sociological data, the method comprising identifying causal relationships between a plurality of documents, identifying a plurality of characteristics of a communication, including a modality used, actors involved, proximate events of relevance, and enabling a user to query based on available characteristics.

Abstract: A system and method for masking a hardware boot sequence are provided. With the system and method, one of the processors of a multiprocessor system is chosen to be a boot processor. The other processors of the multiprocessor system execute masking code that generates electromagnetic and/or thermal signatures that mask the electromagnetic and/or thermal signatures of the actual boot processor. Such masking may involve running the same boot code as the boot processor but without obtaining access to security information, such as the security key for accessing the system. The electromagnetic and/or thermal signatures generated by the execution of the masking code preferably approximate the electromagnetic and/or thermal signatures of the actual boot code executing on the boot processor. In this way, it is difficult to distinguish which processor is the actual boot processor.

Abstract: A method to enable improved analysis and use of sociological data, the method comprising identifying causal relationships between a plurality of documents, identifying a plurality of characteristics of a communication, including a modality used, actors involved, proximate events of relevance, and enabling a user to query based on all of the characteristics available.

Abstract: One of the processors of a multiprocessor system is chosen to be a boot processor. The other processors of the multiprocessor system execute masking code that generates electromagnetic and/or thermal signatures that mask the electromagnetic and/or thermal signatures of the actual boot processor. Such masking may involve running the same boot code as the boot processor but without obtaining access to security information, such as the security key for accessing the system. The electromagnetic and/or thermal signatures generated by the execution of the masking code preferably approximate the electromagnetic and/or thermal signatures of the actual boot code executing on the boot processor. In this way, it is difficult to distinguish which processor is the actual boot processor.

Abstract: A method for broadcasting instructions/data to a plurality of processors in a multiprocessor device via aliasing is provided. In order to broadcast data to a plurality of processors, a control processor writes to the registers that store the identifiers of the processors and sets two or more of these registers to a same value. The control processor may write the desired data/instructions to be broadcast to a portion of memory corresponding to the starting address associated with the processor identifier of the two or more processors. When the two or more processors look for a starting address of their local store from which to read, the two or more processors will identify the same starting address, essentially aliasing the memory region. The two or more processors will read the instructions/data from the same aliased memory region starting at the identified starting address and process the same instructions/data.

Abstract: Systems, methods and media for managing software defects by aggregating potential software defect information from a plurality of user computer systems are disclosed. Embodiments may include receiving a plurality of software state logs each from an originating user computer system, where each software state log is associated with a potential software defect of an application executing on its originating user computer system and each software state log includes software state information associated with its originating user computer system. Embodiments may also include storing the received software state logs in a defect repository and analyzing the software state information of the stored software state logs to detect patterns in the software state information. Further embodiments may include verifying that a potential software defect associated with a software state log is a defect and transmitting a verification of the software defect to the particular user computer system.

Abstract: A system and method for test generation for system level verification using parallel algorithms are provided. The present invention generates test patterns for system level tests by exploiting the scalability of parallel algorithms while allowing for data set coloring and expected result checking. Based on the characteristics of the system being tested an iterative parallel algorithm is selected from a plurality of possible parallel algorithms. The selected parallel algorithm is then separated into separate program statements for execution by a plurality of processors. A serial version of the selected algorithm is executed to generate a set of expected results. The devised parallel version of the selected algorithm is then run to generate a set of test result data which is compared to the set of expected results. If the two sets of data match, it is determined that the system is operating correctly.

Abstract: A mechanism for broadcasting instructions/data to a plurality of processors in a multiprocessor device via aliasing is provided. In order to broadcast data to a plurality of processors, a control processor writes to the registers that store the identifiers of the processors and sets two or more of these registers to a same value. The control processor may write the desired data/instructions to be broadcast to a portion of memory corresponding to the starting address associated with the processor identifier of the two or more processors. When the two or more processors look for a starting address of their local store from which to read the two or more processors will identify the same starting address, essentially aliasing the memory region. The two or more processors will read the instructions/data from the same aliased memory region starting at the identified starting address and process the same instructions/data.

Abstract: A system and method for masking a boot sequence by providing a dummy processor are provided. With the system and method, one of the processors of a multiprocessor system is chosen to be a boot processor. The other processors of the multiprocessor system execute masking code that generates electromagnetic and/or thermal signatures that mask the electromagnetic and/or thermal signatures of the actual boot processor. The execution of the masking code on the non-boot processors preferably generates electromagnetic and/or thermal signatures that approximate the signatures of the actual boot code execution on the boot processor. One of the non-boot processors is selected to execute masking code that is different from the other masking code sequence to thereby generate a electromagnetic and/or thermal signature that appears to be unique from an external monitoring perspective.

Abstract: A method of organizing information is disclosed. The method comprises providing a visualization of actor communications in the context of one or more discussion, a discussion including at least one actor and at least one documented communication.

Abstract: This patent describes a method and apparatus to automatically and accurately winnow down arbitrarily large amounts of electronic information created by a particular population of actors to only those subsets of particular interest by having a causal relationship, even when retrieved documents containing this information do not individually satisfy the search criteria used. An actor in this context is defined as any entity, single or aggregate, capable of creating, distributing, modifying, or receiving digital information. Once identified, this subset of information may, for example, be processed, analyzed, redacted, or destroyed, depending on the context of the system's use.

Abstract: A cache replacement system for extending the debugging capabilities of accelerated simulation by enabling enhanced cache data and state checking is provided. The system includes a Cell Broadband Engine Architecture (CBEA) compliant system implementing Replacement Management Tables in an accelerated simulation environment. The RMTs control cache replacement and allow the software to direct entries with specific address ranges at a particular subset of the cache. The RMTs further allow for locking data in the cache and are utilized to prevent overwriting data in the cache by directing data that is known to be used only once at a particular set. Using the locking mechanism in an accelerated simulation environment, a user is able to run code sets, which, when the microprocessor system being tested is correctly designed, generates identical and verifiable data and cache states in each of the different sets of the cache.

Abstract: A system and method for masking a hardware boot sequence are provided. With the system and method, one of the processors of a multiprocessor system is chosen to be a boot processor. The other processors of the multiprocessor system execute masking code that generates electromagnetic and/or thermal signatures that mask the electromagnetic and/or thermal signatures of the actual boot processor. Such masking may involve running the same boot code as the boot processor but without obtaining access to security information, such as the security key for accessing the system. The electromagnetic and/or thermal signatures generated by the execution of the masking code preferably approximate the electromagnetic and/or thermal signatures of the actual boot code executing on the boot processor. In this way, it is difficult to distinguish which processor is the actual boot processor.

Abstract: A system and method for masking a boot sequence by running different code on each processor of a multiprocessor system are provided. With the system and method, one of the processors of a multiprocessor system is chosen to be a boot processor. The other processors of the multiprocessor system execute masking code that generates electromagnetic and/or thermal signatures that mask the electromagnetic and/or thermal signatures of the actual boot processor. The masking code executed by each of the non-boot processors may be different from each other and may be randomly selected from a plurality of masking code sequences stored in a masking code storage device. Each execution of masking code on each of the non-boot processors may generate a different electromagnetic and/or thermal signature such that none of the processors appear to be unique from an external monitoring perspective.