Patents by Inventor Steven L. Schwartz

Steven L. Schwartz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7188262
    Abstract: Power is conserved in a data processing system that includes a processor core and system circuitry coupled to the processor core. A first method for conserving power includes entering a low power state by the processor and the system circuitry and enabling bus arbitration by the processor while the processor core remains in the low power state. One embodiment further contemplates a method of conserving power by granting bus access to a requesting device and entering a power conservation mode by the processor core in response thereto. Bus operations are then performed while the processor core remains in the power conservation mode. Another embodiment contemplates a method of debugging a data processing system in which a debug state is entered by the processor and the system circuitry and, thereafter, bus arbitration is enabled by the processor while the processor core remains in the debug state.
    Type: Grant
    Filed: February 28, 2003
    Date of Patent: March 6, 2007
    Assignee: Freescale Semiconductor, Inc.
    Inventors: John H. Arends, William C. Moyer, Steven L. Schwartz
  • Publication number: 20030140263
    Abstract: A data processing system and associated methods are disclosed for conserving power in a data processing system that includes a processor core and system circuitry coupled to the processor core. A first method includes entering a low power state by the processor core and the system circuitry and enabling bus arbitration by the processor core while the processor core remains in the low power state. One embodiment of the present invention further contemplates a method of conserving power in a data processing system by granting bus access to a requesting device and entering a power conservation mode by the processor core in response thereto. Bus operations are then performed while the processor core remains in the power conservation mode.
    Type: Application
    Filed: February 28, 2003
    Publication date: July 24, 2003
    Inventors: John H. Arends, William C. Moyer, Steven L. Schwartz
  • Patent number: 6560712
    Abstract: Power is conserved in a data processing system that includes a processor core and system circuitry coupled to the processor core. A first method for conserving power includes entering a low power state by the processor and the system circuitry and enabling bus arbitration by the processor while the processor core remains in the low power state. One embodiment further contemplates a method of conserving power by granting bus access to a requesting device and entering a power conservation mode by the processor core in response thereto. Bus operations are then performed while the processor core remains in the power conservation mode. Another embodiment contemplates a method of debugging a data processing system in which a debug state is entered by the processor and the system circuitry and, thereafter, bus arbitration is enabled by the processor while the processor core remains in the debug state.
    Type: Grant
    Filed: November 16, 1999
    Date of Patent: May 6, 2003
    Assignee: Motorola, Inc.
    Inventors: John H. Arends, William C. Moyer, Steven L. Schwartz