Patents by Inventor Steven L. Scott

Steven L. Scott has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10860524
    Abstract: A multiprocessor computer system comprises a first node operable to access memory local to a remote node by receiving a virtual memory address from a requesting entity in node logic in the first node. The first node creates a network address from the virtual address received in the node logic, where the network address is in a larger address space than the virtual memory address, and sends a fast memory access request from the first node to a network node identified in the network address.
    Type: Grant
    Filed: May 27, 2015
    Date of Patent: December 8, 2020
    Assignee: Intel Corporation
    Inventors: Dennis C. Abts, Robert Alverson, Edwin Froese, Howard Pritchard, Steven L. Scott
  • Patent number: 10817080
    Abstract: A method for rejecting an unintentional palm touch is disclosed. In at least some embodiments, a touch is detected by a touch-sensitive surface associated with a display. Characteristics of the touch may be used to generate a set of parameters related to the touch. In an embodiment, firmware is used to determine a reliability value for the touch. The reliability value and the location of the touch is provided to a software module. The software module uses the reliability value and an activity context to determine a confidence level of the touch. In an embodiment, the confidence level may include an evaluation of changes in the reliability value over time. If the confidence level for the touch is too low, it may be rejected.
    Type: Grant
    Filed: April 20, 2018
    Date of Patent: October 27, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Reed L. Townsend, Alexander J. Kolmykov-Zotov, Steven P. Dodge, Bryan D. Scott
  • Publication number: 20200275696
    Abstract: A cartridge may include a cartridge housing, a reservoir and a wick housing disposed inside the cartridge housing, a heating element, and a wicking element. The cartridge housing may be configured to extend below an open top of a receptacle in the vaporizer device when the cartridge is coupled with the vaporizer device. The reservoir may be configured to contain a vaporizable material. The heating element may include a heating portion disposed at least partially inside the wick housing and a contact portion disposed at least partially outside the wick housing. The contact portion may include cartridge contacts that form an electric coupling with receptacle contacts in the receptacle. The wicking element may be disposed within the wick housing and proximate to the heating portion of the heating element. The wicking element may be configured to draw the vaporizable material to the wick housing for vaporization by the heating element.
    Type: Application
    Filed: February 28, 2020
    Publication date: September 3, 2020
    Inventors: Ariel Atkins, Christopher L. Belisle, Tsuey Chang, Brandon Cheung, Steven Christensen, Dylan E. Entelis, Alexander M. Hoopai, Eric Joseph Johnson, Jason King, Esteban Leon Duque, YongChao Li, Huei-Huei Liang, Matthew J. Malone, James Monsees, Nathan N. Ng, Claire O'Malley, Matthew Rios, Christopher James Rosser, Zachary T. Scott, Andrew J. Stratton, Alim Thawer, Norbert Wesely, James P. Westley, Hao Yin, XueHai Zhang, XueQing Zhang
  • Patent number: 10567654
    Abstract: A light sensor system including a reference light source that moves in unison with a primary mirror and/or an inertial measurement device, and/or the reference light source is directed toward an obscured region of the light sensor system. The reference light source may allow for improved jitter compensation based on feedback of the reference light. The feedback may be representative of the elastic deformation of the optics and telescope optical axis. The improved jitter compensation may allow for the light sensor system (e.g., the housing and/or mirrors) to be built with less stiff materials, which can reduce the cost of manufacturing the present light sensor system compared to previously known optical sensor systems. In cases of high vibration levels which would otherwise degrade the resulting image quality after material stiffness property selections have been exhausted, the light sensor system may provide jitter compensation to improve video or still image quality.
    Type: Grant
    Filed: April 27, 2017
    Date of Patent: February 18, 2020
    Assignee: RAYTHEON COMPANY
    Inventors: Kirk A. Miller, Christopher J. Baker, Steven A. Miller, Walter W. Norman, Lyale F. Marr, Richard L. Scott
  • Patent number: 10478525
    Abstract: A demineralized bone matrix is produced by a process in which a bone body is placed in a first processing solution comprising an acid to demineralize the bone body. The bone body is periodically removed from the first solution at specific time intervals to perform at least one test, such as a compression test, on a mechanical property of the bone body. When the test yields a desired result, the bone body is exposed to a second processing solution that is less acidic than the first, thus minimizing the exposure of the bone body to the harsh acidic conditions of the demineralization phase of the process.
    Type: Grant
    Filed: July 29, 2015
    Date of Patent: November 19, 2019
    Assignee: BACTERIN INTERNATIONAL, INC.
    Inventors: Nancy J. Shelby, Steven M. Scott, Benjamin P. Luchsinger, Gregory A. Juda, Kelly R. Kirker, Darrel L. Holmes, Jesus Hernandez
  • Patent number: 10348739
    Abstract: A method is described for receiving a plurality of node data streams through a data network from a plurality of source nodes, respectively, each of the plurality of node data streams comprising a plurality of node data. The method further comprises determining a respective risk assessment for each of the plurality of node data streams based on a plurality of elements, wherein the respective risk assessment indicates a level of trustworthiness of each of the plurality of node data streams. Moreover, the method comprises determining a plurality of respective actions for each of the plurality of source nodes, based on the respective risk assessment of the plurality of node data streams. The method further comprises instructing each of the plurality of source nodes to perform the respective action.
    Type: Grant
    Filed: February 9, 2016
    Date of Patent: July 9, 2019
    Assignee: CA, Inc.
    Inventors: Steven L. Greenspan, Debra J. Danielson, Kenneth William Scott Morrison
  • Patent number: 10153985
    Abstract: A multiprocessor computer system comprises a dragonfly processor interconnect network that comprises a plurality of processor nodes, a plurality of routers, each router directly coupled to a plurality of terminal nodes, the routers coupled to one another and arranged into a group, and a plurality of groups of routers, such that each group is connected to each other group via at least one direct connection.
    Type: Grant
    Filed: February 17, 2017
    Date of Patent: December 11, 2018
    Assignees: Intel Corporation, The Board of Trustees of the Leland Stanford Junior University
    Inventors: John Kim, Dennis C. Abts, Steven L. Scott, William J. Dally
  • Publication number: 20170353401
    Abstract: A multiprocessor computer system comprises a dragonfly processor interconnect network that comprises a plurality of processor nodes, a plurality of routers, each router directly coupled to a plurality of terminal nodes, the routers coupled to one another and arranged into a group, and a plurality of groups of routers, such that each group is connected to each other group via at least one direct connection.
    Type: Application
    Filed: February 17, 2017
    Publication date: December 7, 2017
    Applicants: Intel Corporation, The Board of Trustees of the Leland Stanford Junior University
    Inventors: John Kim, Dennis C. Abts, Steven L. Scott, William J. Dally
  • Patent number: 9614786
    Abstract: A multiprocessor computer system comprises a dragonfly processor interconnect network that comprises a plurality of processor nodes, a plurality of routers, each router directly coupled to a plurality of terminal nodes, the routers coupled to one another and arranged into a group, and a plurality of groups of routers, such that each group is connected to each other group via at least one direct connection.
    Type: Grant
    Filed: December 27, 2014
    Date of Patent: April 4, 2017
    Assignees: Intel Corporation, The Board of Trustees of the Leland Stanford Junior University
    Inventors: John Kim, Dennis C. Abts, Steven L. Scott, William J. Dally
  • Patent number: 9537772
    Abstract: A system and method for routing in a high-radix network. A packet is received and examined to determine if the packet can be routed adaptively. If the packet can be routed adaptively, the packet is routed adaptively, wherein routing adaptively includes selecting a column, computing a column mask, routing the packet to the column; and selecting an output port as a function of the column mask. If the packet can be routed deterministically, routing deterministically, wherein routing deterministically includes accessing a routing table to obtain an output port and routing the packet to the output port from the routing table.
    Type: Grant
    Filed: June 20, 2014
    Date of Patent: January 3, 2017
    Assignee: Intel Corporation
    Inventors: Steven L. Scott, Gregory Hubbard, Dennis C. Abts
  • Patent number: 9294551
    Abstract: A data-processing system and method for performing collective operations. Some embodiments provide a plurality of leaf software processes, a plurality of collective engines (CEs), and a network operatively coupled to the plurality of CEs, wherein collective operations messages are sent between CEs. Each of the plurality of hierarchies includes a root, leaf CEs, and one or more intermediate levels of CEs between the root and the leaf CEs. Each CE except the root is configured to have a parent CE, and each non-leaf CE in the hierarchy that is not the root CE and not one of the leaf CEs has one or more child CEs. Data is sent from software processes to one or more of the plurality of CEs, and data is received to one or more software processes from one or more of the plurality of collective engines. The root CE outputs a final result.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: March 22, 2016
    Assignee: Cray Inc.
    Inventors: Edwin L. Froese, Robert Baird, Steven L. Scott
  • Publication number: 20150378961
    Abstract: A multiprocessor computer system comprises a first node operable to access memory local to a remote node by receiving a virtual memory address from a requesting entity in node logic in the first node. The first node creates a network address from the virtual address received in the node logic, where the network address is in a larger address space than the virtual memory address, and sends a fast memory access request from the first node to a network node identified in the network address.
    Type: Application
    Filed: May 27, 2015
    Publication date: December 31, 2015
    Applicant: Intel Corporation
    Inventors: Dennis C. Abts, Robert Alverson, Edwin Froese, Howard Pritchard, Steven L. Scott
  • Patent number: 9201689
    Abstract: A method and system for software emulation of hardware support for multi-threaded processing using virtual hardware threads is provided. A software threading system executes on a node that has one or more processors, each with one or more hardware threads. The node has access to local memory and access to remote memory. The software threading system manages the execution of tasks of a user program. The software threading system switches between the virtual hardware threads representing the tasks as the tasks issue remote memory access requests while in user privilege mode. Thus, the software threading system emulates more hardware threads than the underlying hardware supports and switches the virtual hardware threads without the overhead of a context switch to the operating system or change in privilege mode.
    Type: Grant
    Filed: April 22, 2011
    Date of Patent: December 1, 2015
    Assignee: Cray Inc.
    Inventors: Steven L. Scott, Gregory B. Titus, Sung-Eun Choi, Troy A. Johnson, David Mizell, Michael F. Ringenburg, Karlon West
  • Publication number: 20150186318
    Abstract: A multiprocessor computer system comprises a dragonfly processor interconnect network that comprises a plurality of processor nodes, a plurality of routers, each router directly coupled to a plurality of terminal nodes, the routers coupled to one another and arranged into a group, and a plurality of groups of routers, such that each group is connected to each other group via at least one direct connection.
    Type: Application
    Filed: December 27, 2014
    Publication date: July 2, 2015
    Inventors: John Kim, Dennis C. Abts, Steven L. Scott, William J. Dally
  • Patent number: 9069672
    Abstract: A multiprocessor computer system comprises a first node operable to access memory local to a remote node by receiving a virtual memory address from a requesting entity in node logic in the first node. The first node creates a network address from the virtual address received in the node logic, where the network address is in a larger address space than the virtual memory address, and sends a fast memory access request from the first node to a network node identified in the network address.
    Type: Grant
    Filed: June 12, 2009
    Date of Patent: June 30, 2015
    Assignee: Intel Corporation
    Inventors: Dennis C. Abts, Robert Alverson, Edwin Froese, Howard Pritchard, Steven L. Scott
  • Publication number: 20140301390
    Abstract: A system and method for routing in a high-radix network. A packet is received and examined to determine if the packet can be routed adaptively. If the packet can be routed adaptively, the packet is routed adaptively, wherein routing adaptively includes selecting a column, computing a column mask, routing the packet to the column; and selecting an output port as a function of the column mask. If the packet can be routed deterministically, routing deterministically, wherein routing deterministically includes accessing a routing table to obtain an output port and routing the packet to the output port from the routing table.
    Type: Application
    Filed: June 20, 2014
    Publication date: October 9, 2014
    Inventors: Steven L. Scott, Gregory Hubbard, Dennis C. Abts
  • Patent number: 8792512
    Abstract: A multiprocessor computer system comprises a sending processor node and a receiving processor node. The sending processor node is operable to send packets comprising part of a message to a receiver, to maintain a message buffer entry in the sender comprising the sent packets, to track acknowledgment from the receiver that sent packets have been received; to maintain a timer indicating the time since message data has been sent, and to resend packets not acknowledged upon the timer reaching a timeout state. The receiving processor node is operable to send acknowledgement to the sender that received packets have been received, to track packets using a received message table to track which packets comprising part of the message have been received and whether all packets in the message have been received, and to process packets once all packets in a message are received to reassemble the received message.
    Type: Grant
    Filed: June 7, 2007
    Date of Patent: July 29, 2014
    Assignee: Intel Corporation
    Inventors: Steven L. Scott, Dennis C. Abts, Robert Alverson, Edwin Froese
  • Patent number: 8774203
    Abstract: A multiprocessor computer system comprises a sending processor node and a receiving processor node. The sending processor node is operable to send packets comprising part of a message to a receiver, and to send a message complete packet after all packets in the message are sent. The message complete packet includes an indicator of the number of packets in the message, and the message is recognized as complete in the receiver once the number of packets indicated in the message complete packet have been received for the message. The sender tracks acknowledgment from the receiver of receipt of the sent packets; and notifies the receiver when it has received all packets comprising a part of the message.
    Type: Grant
    Filed: June 7, 2007
    Date of Patent: July 8, 2014
    Assignee: Intel Corporation
    Inventors: Steven L. Scott, Dennis C. Abts, Robert Alverson, Edwin Froese
  • Patent number: 8761166
    Abstract: A system and method for routing in a high-radix network. A packet is received and examined to determine if the packet can be routed adaptively. If the packet can be routed adaptively, the packet is routed adaptively, wherein routing adaptively includes selecting a column, computing a column mask, routing the packet to the column; and selecting an output port as a function of the column mask. If the packet can be routed deterministically, routing deterministically, wherein routing deterministically includes accessing a routing table to obtain an output port and routing the packet to the output port from the routing table.
    Type: Grant
    Filed: November 9, 2010
    Date of Patent: June 24, 2014
    Assignee: Intel Corporation
    Inventors: Steven L. Scott, Gregory Hubbard, Dennis C. Abts
  • Patent number: 8601236
    Abstract: A processor core, comprises one or more vector units operable to change between a fine-grained vector mode having a shorter maximum vector length and a coarse-grained vector mode having a longer maximum vector length. Changing vector modes comprises halting all instruction stream execution in the core, flushing one or more registers in a register space, reconfiguring one or more vector registers in the register space, and restarting instruction execution in the core.
    Type: Grant
    Filed: February 29, 2012
    Date of Patent: December 3, 2013
    Assignee: Cray Inc.
    Inventors: Gregory J. Faanes, Eric P. Lundberg, Abdulla Bataineh, Timothy J. Johnson, Michael Parker, James Robert Kohn, Steven L. Scott, Robert Alverson