Abstract: A technique for selecting an optimal quantization direction for a given transport direction in a semiconductor device such as a field effect transistor (FET), a method for preparing a wafer for fabricating such a semiconductor device, and the semiconductor device fabricated by the method. A switching time is calculated for different candidate quantization directions, and for a given current transport direction. The quantization direction that results in the lowest switching time is then determined. In a specific example, Ge nFET performance is enhanced by 12% using the [1 1 0] and [{overscore (4)} 4 21] crystallographic directions for transport and quantization, respectively. Quantization in the [{overscore (1)} 1 0] direction was previously considered optimal.