Patents by Inventor Steven Lee Scott

Steven Lee Scott has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9886409
    Abstract: An integrated circuit device comprises pin resources, a memory controller circuit, a network interface controller circuit, and transmitter circuitry. The pin resources comprise pads coupled to off-chip pins of the integrated circuit device. The memory controller circuit comprises a first interface and the network interface controller circuit comprises a second interface. The transmitter circuitry is configurable to selectively couple either a first signal of the first interface or a second signal of the second interface to a first pad of the pin resources based on a pin distribution between the first interface and the second interface.
    Type: Grant
    Filed: May 18, 2015
    Date of Patent: February 6, 2018
    Assignee: NVIDIA Corporation
    Inventors: Stephen William Keckler, William J. Dally, Steven Lee Scott, Brucek Kurdo Khailany, Michael Allen Parker
  • Publication number: 20170212857
    Abstract: An integrated circuit device comprises pin resources, a memory controller circuit, a network interface controller circuit, and transmitter circuitry. The pin resources comprise pads coupled to off-chip pins of the integrated circuit device. The memory controller circuit comprises a first interface and the network interface controller circuit comprises a second interface. The transmitter circuitry is configurable to selectively couple either a first signal of the first interface or a second signal of the second interface to a first pad of the pin resources based on a pin distribution between the first interface and the second interface.
    Type: Application
    Filed: May 18, 2015
    Publication date: July 27, 2017
    Inventors: Stephen William Keckler, William J. Dally, Steven Lee Scott, Brucek Kurdo Khailany, Michael Allen Parker
  • Publication number: 20160062950
    Abstract: Systems and methods for anomaly detection and guided analysis using structural time-series model. A server may receive a request from a client to analyze a time-series data comprising a plurality of data points. A database of global calendars may be accessed. A structural time-series model may be built from the time-series data and the database of global calendars, the structural time-series model comprising a hidden structure and a plurality of probability distributions, each probability distribution corresponding to a data point. For each data point of the time-series data, a range of expected values is determined from a respective probability distribution, the range of expected values capturing a predefined percentage of the respective probability distribution. An anomaly is detected at a first data point of the time-series data responsive to comparing the first data point with a respective range of expected values. The anomaly is transmitted to the client for display with the time-series data.
    Type: Application
    Filed: December 30, 2014
    Publication date: March 3, 2016
    Inventors: Kay H. Brodersen, Havard Garnes, Dimitris Meretakis, Olaf Bachmann, Steven Lee Scott
  • Patent number: 9058453
    Abstract: A system and method are provided for configuring a plurality of pin resources. The method includes identifying a plurality of pin resources of a primary application specific integrated circuit (ASIC) device and configuring the plurality of pin resources based on a pin distribution between a first interface and a second interface, where the first interface provides a first communication path between the primary ASIC device and a first device, and the second interface provides a second communication path between the primary ASIC device and a second device.
    Type: Grant
    Filed: May 24, 2013
    Date of Patent: June 16, 2015
    Assignee: NVIDIA Corporation
    Inventors: Stephen William Keckler, William J. Dally, Steven Lee Scott, Brucek Kurdo Khailany, Michael Allen Parker
  • Publication number: 20140351780
    Abstract: A system and method are provided for configuring a plurality of pin resources. The method includes identifying a plurality of pin resources of a primary application specific integrated circuit (ASIC) device and configuring the plurality of pin resources based on a pin distribution between a first interface and a second interface, where the first interface provides a first communication path between the primary ASIC device and a first device, and the second interface provides a second communication path between the primary ASIC device and a second device.
    Type: Application
    Filed: May 24, 2013
    Publication date: November 27, 2014
    Inventors: Stephen William Keckler, William J. Dally, Steven Lee Scott, Brucek Kurdo Khailany, Michael Allen Parker
  • Patent number: 8635172
    Abstract: Performance of the machine learning technique is assessed using Bayesian analysis where previously grouped documents belonging to a machine-assigned class or cluster are presented to a human rater and the rater's assessment is fed to the Bayesian analysis processor that updates a Beta bionomial model with each document. The model represents the precision probability associated with the class or cluster under test. Monitoring the precision probability, the technique enforces a set of stopping rules corresponding to an acceptance/rejection assessment of the machine learning apparatus. A Markov Chain Monte Carlo process operates on the model to infuse the processing of each subsequent class or cluster with knowledge from those previously processed.
    Type: Grant
    Filed: October 7, 2011
    Date of Patent: January 21, 2014
    Assignee: Google Inc.
    Inventors: Kirill Buryak, Steven Lee Scott, Steven Doubilet