Abstract: A circuit and method thereof for sampling/holding signal is provided. The signal sampling/holding circuit comprises a first signal sampling/holding device, a second signal sampling/holding device, a target signal and a reference voltage. First, the first signal sampling/holding device is supplied with the reference voltage and the target signal. The reference voltage is disconnected from the first signal sampling/holding device before the target signal is. Similarly, the reference voltage is disconnected from the second signal sampling/holding device before the target signal is. Thus the target signal is respectively sampled and held in the first signal sampling/holding device and the second signal sampling/holding device.

Abstract: A frame shuttered CMOS image sensor with simultaneous array readout. An array of CMOS pixels are printed on a silicon substrate. Within each pixel is a light sensitive region comprising a photo sensitive diode for converting photons into electrical charge and at least three transistors to permit reading of reset electrical charges and collected electrical charges and for re-setting the photosensitive diode. The sensor includes an array of signal and re-set readout capacitors located on the substrate but outside of the pixel array. Metal conductors printed in said substrate connect each pixel in said pixel array with a signal capacitor and a re-set capacitor in array of signal and re-set readout capacitors. Transistor switches printed in said substrate but outside of said pixel array are used to isolate the signal and re-set capacitors from each other and from the pixels.

Abstract: A circuit and method thereof for sampling/holding signal is provided. The signal sampling/holding circuit comprises a first signal sampling/holding device, a second signal sampling/holding device, a target signal and a reference voltage. First, the first signal sampling/holding device is supplied with the reference voltage and the target signal. The reference voltage is disconnected from the first signal sampling/holding device before the target signal is. Similarly, the reference voltage is disconnected from the second signal sampling/holding device before the target signal is. Thus the target signal is respectively sampled and held in the first signal sampling/holding device and the second signal sampling/holding device.

Abstract: A common operational amplifier for a pipeline circuit is provided. The common operational amplifier is used by the stage circuits of the pipeline circuit by turns according to a predetermined timing. The common operational amplifier comprises an operational amplifier circuit, a multiplexer circuit and a demultiplexer circuit. The multiplexer circuit is provided for selecting a signal set of a stage circuit to be amplified to couple to the operational amplifier circuit, and the demultiplexer circuit is provided for transmitting the amplified signal set to the corresponding stage circuit.